121 lines
5.6 KiB
C++
121 lines
5.6 KiB
C++
//===- LoongArchFixupKinds.h - LoongArch Specific Fixup Entries -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHFIXUPKINDS_H
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#define LLVM_LIB_TARGET_LOONGARCH_MCTARGETDESC_LOONGARCHFIXUPKINDS_H
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/MC/MCFixup.h"
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#undef LoongArch
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namespace llvm {
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namespace LoongArch {
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//
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// This table *must* be in the same order of
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// MCFixupKindInfo Infos[LoongArch::NumTargetFixupKinds] in
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// LoongArchAsmBackend.cpp.
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//
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enum Fixups {
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// Define fixups can be handled by LoongArchAsmBackend::applyFixup.
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// 16-bit fixup corresponding to %b16(foo) for instructions like bne.
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fixup_loongarch_b16 = FirstTargetFixupKind,
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// 21-bit fixup corresponding to %b21(foo) for instructions like bnez.
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fixup_loongarch_b21,
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// 26-bit fixup corresponding to %b26(foo)/%plt(foo) for instructions b/bl.
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fixup_loongarch_b26,
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// 20-bit fixup corresponding to %abs_hi20(foo) for instruction lu12i.w.
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fixup_loongarch_abs_hi20,
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// 12-bit fixup corresponding to %abs_lo12(foo) for instruction ori.
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fixup_loongarch_abs_lo12,
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// 20-bit fixup corresponding to %abs64_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_abs64_lo20,
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// 12-bit fixup corresponding to %abs_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_abs64_hi12,
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// 20-bit fixup corresponding to %le_hi20(foo) for instruction lu12i.w.
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fixup_loongarch_tls_le_hi20,
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// 12-bit fixup corresponding to %le_lo12(foo) for instruction ori.
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fixup_loongarch_tls_le_lo12,
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// 20-bit fixup corresponding to %le64_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_tls_le64_lo20,
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// 12-bit fixup corresponding to %le64_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_tls_le64_hi12,
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// TODO: Add more fixup kind.
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// Used as a sentinel, must be the last of the fixup which can be handled by
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// LoongArchAsmBackend::applyFixup.
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fixup_loongarch_invalid,
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NumTargetFixupKinds = fixup_loongarch_invalid - FirstTargetFixupKind,
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// Define fixups for force relocation as FirstLiteralRelocationKind+V
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// represents the relocation type with number V.
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// 20-bit fixup corresponding to %pc_hi20(foo) for instruction pcalau12i.
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fixup_loongarch_pcala_hi20 =
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FirstLiteralRelocationKind + ELF::R_LARCH_PCALA_HI20,
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// 12-bit fixup corresponding to %pc_lo12(foo) for instructions like addi.w/d.
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fixup_loongarch_pcala_lo12,
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// 20-bit fixup corresponding to %pc64_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_pcala64_lo20,
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// 12-bit fixup corresponding to %pc64_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_pcala64_hi12,
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// 20-bit fixup corresponding to %got_pc_hi20(foo) for instruction pcalau12i.
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fixup_loongarch_got_pc_hi20,
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// 12-bit fixup corresponding to %got_pc_lo12(foo) for instructions
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// ld.w/ld.d/add.d.
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fixup_loongarch_got_pc_lo12,
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// 20-bit fixup corresponding to %got64_pc_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_got64_pc_lo20,
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// 12-bit fixup corresponding to %got64_pc_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_got64_pc_hi12,
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// 20-bit fixup corresponding to %got_hi20(foo) for instruction lu12i.w.
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fixup_loongarch_got_hi20,
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// 12-bit fixup corresponding to %got_lo12(foo) for instruction ori.
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fixup_loongarch_got_lo12,
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// 20-bit fixup corresponding to %got64_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_got64_lo20,
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// 12-bit fixup corresponding to %got64_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_got64_hi12,
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// Skip R_LARCH_TLS_LE_*.
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// 20-bit fixup corresponding to %ie_pc_hi20(foo) for instruction pcalau12i.
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fixup_loongarch_tls_ie_pc_hi20 =
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FirstLiteralRelocationKind + ELF::R_LARCH_TLS_IE_PC_HI20,
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// 12-bit fixup corresponding to %ie_pc_lo12(foo) for instructions
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// ld.w/ld.d/add.d.
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fixup_loongarch_tls_ie_pc_lo12,
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// 20-bit fixup corresponding to %ie64_pc_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_tls_ie64_pc_lo20,
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// 12-bit fixup corresponding to %ie64_pc_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_tls_ie64_pc_hi12,
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// 20-bit fixup corresponding to %ie_hi20(foo) for instruction lu12i.w.
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fixup_loongarch_tls_ie_hi20,
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// 12-bit fixup corresponding to %ie_lo12(foo) for instruction ori.
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fixup_loongarch_tls_ie_lo12,
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// 20-bit fixup corresponding to %ie64_lo20(foo) for instruction lu32i.d.
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fixup_loongarch_tls_ie64_lo20,
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// 12-bit fixup corresponding to %ie64_hi12(foo) for instruction lu52i.d.
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fixup_loongarch_tls_ie64_hi12,
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// 20-bit fixup corresponding to %ld_pc_hi20(foo) for instruction pcalau12i.
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fixup_loongarch_tls_ld_pc_hi20,
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// 20-bit fixup corresponding to %ld_hi20(foo) for instruction lu12i.w.
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fixup_loongarch_tls_ld_hi20,
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// 20-bit fixup corresponding to %gd_pc_hi20(foo) for instruction pcalau12i.
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fixup_loongarch_tls_gd_pc_hi20,
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// 20-bit fixup corresponding to %gd_hi20(foo) for instruction lu12i.w.
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fixup_loongarch_tls_gd_hi20,
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// Generate an R_LARCH_RELAX which indicates the linker may relax here.
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fixup_loongarch_relax = FirstLiteralRelocationKind + ELF::R_LARCH_RELAX,
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// Generate an R_LARCH_ALIGN which indicates the linker may fixup align here.
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fixup_loongarch_align = FirstLiteralRelocationKind + ELF::R_LARCH_ALIGN,
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// 36-bit fixup corresponding to %call36(foo) for a pair instructions:
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// pcaddu18i+jirl.
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fixup_loongarch_call36 = FirstLiteralRelocationKind + ELF::R_LARCH_CALL36,
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};
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} // end namespace LoongArch
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} // end namespace llvm
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#endif
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