162 lines
5 KiB
C++
162 lines
5 KiB
C++
//===-- M68kInstPrinter.cpp - Convert M68k MCInst to asm --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file contains definitions for an M68k MCInst printer.
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///
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//===----------------------------------------------------------------------===//
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// TODO Conform with all supported Motorola ASM syntax
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// Motorola's assembly has several syntax variants, especially on
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// addressing modes.
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// For example, you can write pc indirect w/ displacement as
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// `x(%pc)`, where `x` is the displacement imm, or `(x,%pc)`.
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// Currently we're picking the variant that is different from
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// GCC, albeit being recognizable by GNU AS.
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// Not sure what is the impact now (e.g. some syntax might
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// not be recognized by some old consoles' toolchains, in which
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// case we can not use our integrated assembler), but either way,
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// it will be great to support all of the variants in the future.
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#include "M68kInstPrinter.h"
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#include "M68kBaseInfo.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#define PRINT_ALIAS_INSTR
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#include "M68kGenAsmWriter.inc"
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void M68kInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
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OS << "%" << getRegisterName(Reg);
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}
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void M68kInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annot, const MCSubtargetInfo &STI,
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raw_ostream &O) {
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if (!printAliasInstr(MI, Address, O))
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printInstruction(MI, Address, O);
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printAnnotation(O, Annot);
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}
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void M68kInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(OpNo);
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if (MO.isReg()) {
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printRegName(O, MO.getReg());
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return;
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}
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if (MO.isImm()) {
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printImmediate(MI, OpNo, O);
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return;
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}
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assert(MO.isExpr() && "Unknown operand kind in printOperand");
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MO.getExpr()->print(O, &MAI);
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}
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void M68kInstPrinter::printImmediate(const MCInst *MI, unsigned opNum,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(opNum);
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if (MO.isImm())
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O << '#' << MO.getImm();
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else if (MO.isExpr()) {
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O << '#';
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MO.getExpr()->print(O, &MAI);
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} else
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llvm_unreachable("Unknown immediate kind");
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}
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void M68kInstPrinter::printMoveMask(const MCInst *MI, unsigned opNum,
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raw_ostream &O) {
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unsigned Mask = MI->getOperand(opNum).getImm();
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assert((Mask & 0xFFFF) == Mask && "Mask is always 16 bits");
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// A move mask is splitted into two parts:
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// bits 0 ~ 7 correspond to D0 ~ D7 regs
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// bits 8 ~ 15 correspond to A0 ~ A7 regs
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//
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// In the assembly syntax, we want to use a dash to replace
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// a continuous range of registers. For example, if the bit
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// mask is 0b101110, we want to print "D1-D3,D5" instead of
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// "D1,D2,D3,D4,D5".
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//
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// However, we don't want a dash to cross between data registers
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// and address registers (i.e. there shouldn't be a dash crossing
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// bit 7 and 8) since that is not really intuitive. So we simply
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// print the data register part (bit 0~7) and address register part
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// separately.
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uint8_t HalfMask;
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unsigned Reg;
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for (int s = 0; s < 16; s += 8) {
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HalfMask = (Mask >> s) & 0xFF;
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// Print separation comma only if
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// both data & register parts have bit(s) set
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if (s != 0 && (Mask & 0xFF) && HalfMask)
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O << '/';
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for (int i = 0; HalfMask; ++i) {
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if ((HalfMask >> i) & 0b1) {
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HalfMask ^= 0b1 << i;
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Reg = M68kII::getMaskedSpillRegister(i + s);
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printRegName(O, Reg);
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int j = i;
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while ((HalfMask >> (j + 1)) & 0b1)
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HalfMask ^= 0b1 << ++j;
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if (j != i) {
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O << '-';
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Reg = M68kII::getMaskedSpillRegister(j + s);
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printRegName(O, Reg);
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}
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i = j;
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if (HalfMask)
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O << '/';
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}
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}
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}
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}
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void M68kInstPrinter::printDisp(const MCInst *MI, unsigned opNum,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(opNum);
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if (Op.isImm()) {
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O << Op.getImm();
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return;
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}
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assert(Op.isExpr() && "Unknown operand kind in printOperand");
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Op.getExpr()->print(O, &MAI);
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}
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// NOTE forcing (W,L) size available since M68020 only
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void M68kInstPrinter::printAbsMem(const MCInst *MI, unsigned opNum,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(opNum);
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if (MO.isExpr()) {
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MO.getExpr()->print(O, &MAI);
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return;
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}
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assert(MO.isImm() && "absolute memory addressing needs an immediate");
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O << format("$%0" PRIx64, (uint64_t)MO.getImm());
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}
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