90 lines
3.3 KiB
C++
90 lines
3.3 KiB
C++
//===- PPCLegalizerInfo.h ----------------------------------------*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for PowerPC
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//===----------------------------------------------------------------------===//
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#include "PPCLegalizerInfo.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "ppc-legalinfo"
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using namespace llvm;
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using namespace LegalizeActions;
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using namespace LegalizeMutations;
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using namespace LegalityPredicates;
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static LegalityPredicate isRegisterType(unsigned TypeIdx) {
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return [=](const LegalityQuery &Query) {
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const LLT QueryTy = Query.Types[TypeIdx];
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unsigned TypeSize = QueryTy.getSizeInBits();
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if (TypeSize % 32 == 1 || TypeSize > 128)
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return false;
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// Check if this is a legal PowerPC vector type.
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if (QueryTy.isVector()) {
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const int EltSize = QueryTy.getElementType().getSizeInBits();
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return (EltSize == 8 || EltSize == 16 || EltSize == 32 || EltSize == 64);
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}
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return true;
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};
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}
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PPCLegalizerInfo::PPCLegalizerInfo(const PPCSubtarget &ST) {
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using namespace TargetOpcode;
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const LLT P0 = LLT::pointer(0, 64);
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const LLT S1 = LLT::scalar(1);
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const LLT S8 = LLT::scalar(8);
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const LLT S16 = LLT::scalar(16);
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const LLT S32 = LLT::scalar(32);
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const LLT S64 = LLT::scalar(64);
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const LLT V16S8 = LLT::fixed_vector(16, 8);
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const LLT V8S16 = LLT::fixed_vector(8, 16);
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const LLT V4S32 = LLT::fixed_vector(4, 32);
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const LLT V2S64 = LLT::fixed_vector(2, 64);
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getActionDefinitionsBuilder(G_IMPLICIT_DEF).legalFor({S64});
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getActionDefinitionsBuilder(G_CONSTANT)
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.legalFor({S32, S64})
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.clampScalar(0, S64, S64);
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getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
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.legalForCartesianProduct({S64}, {S1, S8, S16, S32})
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.clampScalar(0, S64, S64);
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getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
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.legalFor({S64, V4S32})
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.clampScalar(0, S64, S64)
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.bitcastIf(typeIsNot(0, V4S32), changeTo(0, V4S32));
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getActionDefinitionsBuilder({G_ADD, G_SUB})
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.legalFor({S64, V16S8, V8S16, V4S32, V2S64})
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.clampScalar(0, S64, S64);
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getActionDefinitionsBuilder(G_BITCAST)
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.legalIf(all(isRegisterType(0), isRegisterType(1)))
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.lower();
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getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
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.legalFor({S32, S64, V4S32, V2S64});
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getActionDefinitionsBuilder(G_FCMP).legalForCartesianProduct({S1},
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{S32, S64});
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getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
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.legalForCartesianProduct({S64}, {S32, S64});
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getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
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.legalForCartesianProduct({S32, S64}, {S64});
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getActionDefinitionsBuilder({G_LOAD, G_STORE})
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.legalForTypesWithMemDesc({{S64, P0, S64, 8}, {S32, P0, S32, 4}});
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getActionDefinitionsBuilder(G_FCONSTANT).lowerFor({S32, S64});
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getActionDefinitionsBuilder(G_CONSTANT_POOL).legalFor({P0});
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getLegacyLegalizerInfo().computeTables();
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}
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