128 lines
4.6 KiB
C++
128 lines
4.6 KiB
C++
//===-- SystemZSubtarget.h - SystemZ subtarget information -----*- C++ -*--===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the SystemZ specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
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#include "SystemZFrameLowering.h"
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#include "SystemZISelLowering.h"
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#include "SystemZInstrInfo.h"
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#include "SystemZRegisterInfo.h"
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#include "SystemZSelectionDAGInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/TargetParser/Triple.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "SystemZGenSubtargetInfo.inc"
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namespace llvm {
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class GlobalValue;
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class StringRef;
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class SystemZSubtarget : public SystemZGenSubtargetInfo {
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virtual void anchor();
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protected:
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// Bool members corresponding to the SubtargetFeatures defined in tablegen.
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#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
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bool ATTRIBUTE = DEFAULT;
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#include "SystemZGenSubtargetInfo.inc"
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private:
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Triple TargetTriple;
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std::unique_ptr<SystemZCallingConventionRegisters> SpecialRegisters;
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SystemZInstrInfo InstrInfo;
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SystemZTargetLowering TLInfo;
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SystemZSelectionDAGInfo TSInfo;
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std::unique_ptr<const SystemZFrameLowering> FrameLowering;
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SystemZSubtarget &initializeSubtargetDependencies(StringRef CPU,
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StringRef TuneCPU,
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StringRef FS);
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SystemZCallingConventionRegisters *initializeSpecialRegisters();
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public:
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SystemZSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &TuneCPU, const std::string &FS,
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const TargetMachine &TM);
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SystemZCallingConventionRegisters *getSpecialRegisters() const {
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assert(SpecialRegisters && "Unsupported SystemZ calling convention");
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return SpecialRegisters.get();
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}
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template <class SR> SR &getSpecialRegisters() const {
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return *static_cast<SR *>(getSpecialRegisters());
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}
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const TargetFrameLowering *getFrameLowering() const override {
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return FrameLowering.get();
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}
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template <class TFL> const TFL *getFrameLowering() const {
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return static_cast<const TFL *>(getFrameLowering());
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}
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const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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const SystemZRegisterInfo *getRegisterInfo() const override {
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return &InstrInfo.getRegisterInfo();
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}
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const SystemZTargetLowering *getTargetLowering() const override {
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return &TLInfo;
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}
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const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
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return &TSInfo;
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}
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// True if the subtarget should run MachineScheduler after aggressive
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// coalescing. This currently replaces the SelectionDAG scheduler with the
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// "source" order scheduler.
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bool enableMachineScheduler() const override { return true; }
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// This is important for reducing register pressure in vector code.
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bool useAA() const override { return true; }
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// Always enable the early if-conversion pass.
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bool enableEarlyIfConversion() const override { return true; }
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// Enable tracking of subregister liveness in register allocator.
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bool enableSubRegLiveness() const override;
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// Automatically generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
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// Getters for SubtargetFeatures defined in tablegen.
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#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
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bool GETTER() const { return ATTRIBUTE; }
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#include "SystemZGenSubtargetInfo.inc"
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bool isAddressedViaADA(const GlobalValue *GV) const;
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// Return true if GV can be accessed using LARL for reloc model RM
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// and code model CM.
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bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const;
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bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
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// Returns TRUE if we are generating GOFF object code
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bool isTargetGOFF() const { return TargetTriple.isOSBinFormatGOFF(); }
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// Returns TRUE if we are using XPLINK64 linkage convention
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bool isTargetXPLINK64() const { return (isTargetGOFF() && isTargetzOS()); }
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// Returns TRUE if we are generating code for a s390x machine running zOS
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bool isTargetzOS() const { return TargetTriple.isOSzOS(); }
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};
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} // end namespace llvm
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#endif
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