195 lines
8.5 KiB
TableGen
195 lines
8.5 KiB
TableGen
// WebAssemblyInstrMemory.td-WebAssembly Memory codegen support -*- tablegen -*-
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// WebAssembly Memory operand code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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// TODO:
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// - WebAssemblyTargetLowering having to do with atomics
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// - Each has optional alignment.
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// WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16
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// local types. These memory-only types instead zero- or sign-extend into local
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// types when loading, and truncate when storing.
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// Address Operands
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// These patterns match the static (offset) and dynamic (address stack operand)
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// operands for loads and stores, based on a combination of target global
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// addresses and constants.
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// For example,
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// (load (add tga, x)) -> load offset=tga, addr=x
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// (store v, tga) -> store v, offset=tga, addr=0
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// (load (add const, x)) -> load offset=const, addr=x
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// (store v, const) -> store v, offset=const, addr=0
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// (load x) -> load offset=0, addr=x
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def AddrOps32 : ComplexPattern<i32, 2, "SelectAddrOperands32">;
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def AddrOps64 : ComplexPattern<i64, 2, "SelectAddrOperands64">;
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// Defines atomic and non-atomic loads, regular and extending.
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multiclass WebAssemblyLoad<WebAssemblyRegClass rc, string Name, int Opcode,
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list<Predicate> reqs = []> {
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let mayLoad = 1, UseNamedOperandTable = 1 in {
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defm "_A32": I<(outs rc:$dst),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr),
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(outs), (ins P2Align:$p2align, offset32_op:$off),
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[], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"),
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!strconcat(Name, "\t${off}${p2align}"), Opcode, false>,
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Requires<reqs>;
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defm "_A64": I<(outs rc:$dst),
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(ins P2Align:$p2align, offset64_op:$off, I64:$addr),
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(outs), (ins P2Align:$p2align, offset64_op:$off),
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[], !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}"),
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!strconcat(Name, "\t${off}${p2align}"), Opcode, true>,
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Requires<reqs>;
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}
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}
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// Basic load.
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// FIXME: When we can break syntax compatibility, reorder the fields in the
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// asmstrings to match the binary encoding.
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defm LOAD_I32 : WebAssemblyLoad<I32, "i32.load", 0x28, []>;
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defm LOAD_I64 : WebAssemblyLoad<I64, "i64.load", 0x29, []>;
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defm LOAD_F32 : WebAssemblyLoad<F32, "f32.load", 0x2a, []>;
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defm LOAD_F64 : WebAssemblyLoad<F64, "f64.load", 0x2b, []>;
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// Extending load.
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defm LOAD8_S_I32 : WebAssemblyLoad<I32, "i32.load8_s", 0x2c, []>;
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defm LOAD8_U_I32 : WebAssemblyLoad<I32, "i32.load8_u", 0x2d, []>;
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defm LOAD16_S_I32 : WebAssemblyLoad<I32, "i32.load16_s", 0x2e, []>;
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defm LOAD16_U_I32 : WebAssemblyLoad<I32, "i32.load16_u", 0x2f, []>;
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defm LOAD8_S_I64 : WebAssemblyLoad<I64, "i64.load8_s", 0x30, []>;
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defm LOAD8_U_I64 : WebAssemblyLoad<I64, "i64.load8_u", 0x31, []>;
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defm LOAD16_S_I64 : WebAssemblyLoad<I64, "i64.load16_s", 0x32, []>;
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defm LOAD16_U_I64 : WebAssemblyLoad<I64, "i64.load16_u", 0x33, []>;
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defm LOAD32_S_I64 : WebAssemblyLoad<I64, "i64.load32_s", 0x34, []>;
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defm LOAD32_U_I64 : WebAssemblyLoad<I64, "i64.load32_u", 0x35, []>;
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// Pattern matching
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multiclass LoadPat<ValueType ty, SDPatternOperator kind, string Name> {
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def : Pat<(ty (kind (AddrOps32 offset32_op:$offset, I32:$addr))),
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(!cast<NI>(Name # "_A32") 0,
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offset32_op:$offset,
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I32:$addr)>,
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Requires<[HasAddr32]>;
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def : Pat<(ty (kind (AddrOps64 offset64_op:$offset, I64:$addr))),
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(!cast<NI>(Name # "_A64") 0,
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offset64_op:$offset,
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I64:$addr)>,
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Requires<[HasAddr64]>;
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}
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defm : LoadPat<i32, load, "LOAD_I32">;
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defm : LoadPat<i64, load, "LOAD_I64">;
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defm : LoadPat<f32, load, "LOAD_F32">;
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defm : LoadPat<f64, load, "LOAD_F64">;
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defm : LoadPat<i32, sextloadi8, "LOAD8_S_I32">;
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defm : LoadPat<i32, sextloadi16, "LOAD16_S_I32">;
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defm : LoadPat<i64, sextloadi8, "LOAD8_S_I64">;
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defm : LoadPat<i64, sextloadi16, "LOAD16_S_I64">;
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defm : LoadPat<i64, sextloadi32, "LOAD32_S_I64">;
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defm : LoadPat<i32, zextloadi8, "LOAD8_U_I32">;
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defm : LoadPat<i32, zextloadi16, "LOAD16_U_I32">;
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defm : LoadPat<i64, zextloadi8, "LOAD8_U_I64">;
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defm : LoadPat<i64, zextloadi16, "LOAD16_U_I64">;
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defm : LoadPat<i64, zextloadi32, "LOAD32_U_I64">;
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defm : LoadPat<i32, extloadi8, "LOAD8_U_I32">;
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defm : LoadPat<i32, extloadi16, "LOAD16_U_I32">;
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defm : LoadPat<i64, extloadi8, "LOAD8_U_I64">;
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defm : LoadPat<i64, extloadi16, "LOAD16_U_I64">;
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defm : LoadPat<i64, extloadi32, "LOAD32_U_I64">;
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// Defines atomic and non-atomic stores, regular and truncating
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multiclass WebAssemblyStore<WebAssemblyRegClass rc, string Name, int Opcode,
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list<Predicate> reqs = []> {
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let mayStore = 1, UseNamedOperandTable = 1 in
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defm "_A32" : I<(outs),
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(ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
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(outs),
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(ins P2Align:$p2align, offset32_op:$off), [],
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!strconcat(Name, "\t${off}(${addr})${p2align}, $val"),
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!strconcat(Name, "\t${off}${p2align}"), Opcode, false>,
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Requires<reqs>;
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let mayStore = 1, UseNamedOperandTable = 1 in
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defm "_A64" : I<(outs),
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(ins P2Align:$p2align, offset64_op:$off, I64:$addr, rc:$val),
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(outs),
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(ins P2Align:$p2align, offset64_op:$off), [],
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!strconcat(Name, "\t${off}(${addr})${p2align}, $val"),
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!strconcat(Name, "\t${off}${p2align}"), Opcode, true>,
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Requires<reqs>;
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}
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// Basic store.
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// Note: WebAssembly inverts SelectionDAG's usual operand order.
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defm STORE_I32 : WebAssemblyStore<I32, "i32.store", 0x36>;
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defm STORE_I64 : WebAssemblyStore<I64, "i64.store", 0x37>;
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defm STORE_F32 : WebAssemblyStore<F32, "f32.store", 0x38>;
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defm STORE_F64 : WebAssemblyStore<F64, "f64.store", 0x39>;
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multiclass StorePat<ValueType ty, SDPatternOperator kind, string Name> {
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def : Pat<(kind ty:$val, (AddrOps32 offset32_op:$offset, I32:$addr)),
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(!cast<NI>(Name # "_A32") 0,
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offset32_op:$offset,
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I32:$addr,
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ty:$val)>,
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Requires<[HasAddr32]>;
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def : Pat<(kind ty:$val, (AddrOps64 offset64_op:$offset, I64:$addr)),
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(!cast<NI>(Name # "_A64") 0,
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offset64_op:$offset,
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I64:$addr,
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ty:$val)>,
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Requires<[HasAddr64]>;
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}
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defm : StorePat<i32, store, "STORE_I32">;
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defm : StorePat<i64, store, "STORE_I64">;
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defm : StorePat<f32, store, "STORE_F32">;
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defm : StorePat<f64, store, "STORE_F64">;
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// Truncating store.
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defm STORE8_I32 : WebAssemblyStore<I32, "i32.store8", 0x3a>;
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defm STORE16_I32 : WebAssemblyStore<I32, "i32.store16", 0x3b>;
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defm STORE8_I64 : WebAssemblyStore<I64, "i64.store8", 0x3c>;
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defm STORE16_I64 : WebAssemblyStore<I64, "i64.store16", 0x3d>;
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defm STORE32_I64 : WebAssemblyStore<I64, "i64.store32", 0x3e>;
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defm : StorePat<i32, truncstorei8, "STORE8_I32">;
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defm : StorePat<i32, truncstorei16, "STORE16_I32">;
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defm : StorePat<i64, truncstorei8, "STORE8_I64">;
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defm : StorePat<i64, truncstorei16, "STORE16_I64">;
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defm : StorePat<i64, truncstorei32, "STORE32_I64">;
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multiclass MemoryOps<WebAssemblyRegClass rc, string B> {
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// Current memory size.
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defm MEMORY_SIZE_A#B : I<(outs rc:$dst), (ins i32imm:$flags),
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(outs), (ins i32imm:$flags),
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[(set rc:$dst,
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(int_wasm_memory_size (i32 imm:$flags)))],
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"memory.size\t$dst, $flags", "memory.size\t$flags",
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0x3f>;
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// Grow memory.
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defm MEMORY_GROW_A#B : I<(outs rc:$dst), (ins i32imm:$flags, rc:$delta),
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(outs), (ins i32imm:$flags),
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[(set rc:$dst,
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(int_wasm_memory_grow (i32 imm:$flags),
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rc:$delta))],
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"memory.grow\t$dst, $flags, $delta",
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"memory.grow\t$flags", 0x40>;
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}
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defm : MemoryOps<I32, "32">;
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defm : MemoryOps<I64, "64">;
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