241 lines
13 KiB
TableGen
241 lines
13 KiB
TableGen
//===---X86InstrPredicates.td - X86 Predicate Definitions --*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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def TruePredicate : Predicate<"true">;
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// Intel x86 instructions have three separate encoding spaces: legacy, VEX, and
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// EVEX. Not all X86 instructions are extended for EGPR. The following is an
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// overview of which instructions are extended and how we implement them.
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//
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// * Legacy space
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// All instructions in legacy maps 0 and 1 that have explicit GPR or memory
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// operands can use the REX2 prefix to access the EGPR, except XSAVE*/XRSTOR.
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//
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// * EVEX space
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// All instructions in the EVEX space can access the EGPR in their
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// register/memory operands.
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//
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// For the above intructions, the only difference in encoding is reflected in
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// the REX2/EVEX prefix when EGPR is used, i.e. the opcode and opcode name are
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// unchanged. We don’t add new entries in TD, and instead we extend GPR with
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// R16-R31 and make them allocatable only when the feature EGPR is available.
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//
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// Besides, some instructions in legacy space with map 2/3 and VEX space are
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// promoted into EVEX space. Encoding space changes after the promotion, opcode
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// and opcode map may change too sometimes. For these instructions, we add new
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// entries in TD to avoid overcomplicating the assembler and disassembler.
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//
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// HasEGPR is for the new entries and NoEGPR is for the entries before
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// promotion, so that the promoted variant can be selected first to benefit RA.
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def HasEGPR : Predicate<"Subtarget->hasEGPR()">;
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def NoEGPR : Predicate<"!Subtarget->hasEGPR()">;
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// APX extends some instructions with a new form that has an extra register
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// operand called a new data destination (NDD). In such forms, NDD is the new
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// destination register receiving the result of the computation and all other
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// operands (including the original destination operand) become read-only source
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// operands.
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//
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// HasNDD is for the new NDD entries and NoNDD is for the legacy 2-address
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// entries, so that the NDD variant can be selected first to benefit RA.
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def HasNDD : Predicate<"Subtarget->hasNDD()">;
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def NoNDD : Predicate<"!Subtarget->hasNDD()">;
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def HasCMOV : Predicate<"Subtarget->canUseCMOV()">;
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def NoCMOV : Predicate<"!Subtarget->canUseCMOV()">;
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def HasNOPL : Predicate<"Subtarget->hasNOPL()">;
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def HasMMX : Predicate<"Subtarget->hasMMX()">;
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def Has3DNow : Predicate<"Subtarget->hasThreeDNow()">;
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def Has3DNowA : Predicate<"Subtarget->hasThreeDNowA()">;
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def HasSSE1 : Predicate<"Subtarget->hasSSE1()">;
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def UseSSE1 : Predicate<"Subtarget->hasSSE1() && !Subtarget->hasAVX()">;
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def HasSSE2 : Predicate<"Subtarget->hasSSE2()">;
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def UseSSE2 : Predicate<"Subtarget->hasSSE2() && !Subtarget->hasAVX()">;
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def HasSSE3 : Predicate<"Subtarget->hasSSE3()">;
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def UseSSE3 : Predicate<"Subtarget->hasSSE3() && !Subtarget->hasAVX()">;
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def HasSSSE3 : Predicate<"Subtarget->hasSSSE3()">;
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def UseSSSE3 : Predicate<"Subtarget->hasSSSE3() && !Subtarget->hasAVX()">;
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def HasSSE41 : Predicate<"Subtarget->hasSSE41()">;
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def NoSSE41 : Predicate<"!Subtarget->hasSSE41()">;
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def UseSSE41 : Predicate<"Subtarget->hasSSE41() && !Subtarget->hasAVX()">;
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def HasSSE42 : Predicate<"Subtarget->hasSSE42()">;
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def UseSSE42 : Predicate<"Subtarget->hasSSE42() && !Subtarget->hasAVX()">;
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def HasSSE4A : Predicate<"Subtarget->hasSSE4A()">;
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def NoAVX : Predicate<"!Subtarget->hasAVX()">;
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def HasAVX : Predicate<"Subtarget->hasAVX()">;
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def HasAVX2 : Predicate<"Subtarget->hasAVX2()">;
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def HasAVX1Only : Predicate<"Subtarget->hasAVX() && !Subtarget->hasAVX2()">;
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def HasEVEX512 : Predicate<"Subtarget->hasEVEX512()">;
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def HasAVX10_1 : Predicate<"Subtarget->hasAVX10_1()">;
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def HasAVX10_1_512 : Predicate<"Subtarget->hasAVX10_1_512()">;
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def HasAVX512 : Predicate<"Subtarget->hasAVX512()">;
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def UseAVX : Predicate<"Subtarget->hasAVX() && !Subtarget->hasAVX512()">;
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def UseAVX2 : Predicate<"Subtarget->hasAVX2() && !Subtarget->hasAVX512()">;
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def NoAVX512 : Predicate<"!Subtarget->hasAVX512()">;
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def HasCDI : Predicate<"Subtarget->hasCDI()">;
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def HasVPOPCNTDQ : Predicate<"Subtarget->hasVPOPCNTDQ()">;
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def HasPFI : Predicate<"Subtarget->hasPFI()">;
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def HasERI : Predicate<"Subtarget->hasERI()">;
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def HasDQI : Predicate<"Subtarget->hasDQI()">;
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def NoDQI : Predicate<"!Subtarget->hasDQI()">;
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def HasBWI : Predicate<"Subtarget->hasBWI()">;
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def NoBWI : Predicate<"!Subtarget->hasBWI()">;
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def HasVLX : Predicate<"Subtarget->hasVLX()">;
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def NoVLX : Predicate<"!Subtarget->hasVLX()">;
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def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
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def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
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def HasPKU : Predicate<"Subtarget->hasPKU()">;
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def HasVNNI : Predicate<"Subtarget->hasVNNI()">;
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def HasVP2INTERSECT : Predicate<"Subtarget->hasVP2INTERSECT()">;
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def HasBF16 : Predicate<"Subtarget->hasBF16()">;
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def HasFP16 : Predicate<"Subtarget->hasFP16()">;
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def HasAVXVNNIINT16 : Predicate<"Subtarget->hasAVXVNNIINT16()">;
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def HasAVXVNNIINT8 : Predicate<"Subtarget->hasAVXVNNIINT8()">;
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def HasAVXVNNI : Predicate <"Subtarget->hasAVXVNNI()">;
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def NoVLX_Or_NoVNNI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVNNI()">;
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def HasBITALG : Predicate<"Subtarget->hasBITALG()">;
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def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
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def HasAES : Predicate<"Subtarget->hasAES()">;
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def HasVAES : Predicate<"Subtarget->hasVAES()">;
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def NoVLX_Or_NoVAES : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVAES()">;
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def HasFXSR : Predicate<"Subtarget->hasFXSR()">;
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def HasX87 : Predicate<"Subtarget->hasX87()">;
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def HasXSAVE : Predicate<"Subtarget->hasXSAVE()">;
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def HasXSAVEOPT : Predicate<"Subtarget->hasXSAVEOPT()">;
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def HasXSAVEC : Predicate<"Subtarget->hasXSAVEC()">;
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def HasXSAVES : Predicate<"Subtarget->hasXSAVES()">;
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def HasPCLMUL : Predicate<"Subtarget->hasPCLMUL()">;
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def NoVLX_Or_NoVPCLMULQDQ :
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Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()">;
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def HasVPCLMULQDQ : Predicate<"Subtarget->hasVPCLMULQDQ()">;
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def HasGFNI : Predicate<"Subtarget->hasGFNI()">;
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def HasFMA : Predicate<"Subtarget->hasFMA()">;
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def HasFMA4 : Predicate<"Subtarget->hasFMA4()">;
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def NoFMA4 : Predicate<"!Subtarget->hasFMA4()">;
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def HasXOP : Predicate<"Subtarget->hasXOP()">;
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def HasTBM : Predicate<"Subtarget->hasTBM()">;
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def NoTBM : Predicate<"!Subtarget->hasTBM()">;
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def HasLWP : Predicate<"Subtarget->hasLWP()">;
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def HasMOVBE : Predicate<"Subtarget->hasMOVBE()">;
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def HasRDRAND : Predicate<"Subtarget->hasRDRAND()">;
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def HasF16C : Predicate<"Subtarget->hasF16C()">;
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def HasFSGSBase : Predicate<"Subtarget->hasFSGSBase()">;
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def HasLZCNT : Predicate<"Subtarget->hasLZCNT()">;
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def HasBMI : Predicate<"Subtarget->hasBMI()">;
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def HasBMI2 : Predicate<"Subtarget->hasBMI2()">;
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def NoBMI2 : Predicate<"!Subtarget->hasBMI2()">;
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def HasVBMI : Predicate<"Subtarget->hasVBMI()">;
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def HasVBMI2 : Predicate<"Subtarget->hasVBMI2()">;
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def HasIFMA : Predicate<"Subtarget->hasIFMA()">;
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def HasAVXIFMA : Predicate<"Subtarget->hasAVXIFMA()">;
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def NoVLX_Or_NoIFMA : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasIFMA()">;
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def HasRTM : Predicate<"Subtarget->hasRTM()">;
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def HasSHA : Predicate<"Subtarget->hasSHA()">;
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def HasSHA512 : Predicate<"Subtarget->hasSHA512()">;
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def HasSGX : Predicate<"Subtarget->hasSGX()">;
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def HasSM3 : Predicate<"Subtarget->hasSM3()">;
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def HasRDSEED : Predicate<"Subtarget->hasRDSEED()">;
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def HasSSEPrefetch : Predicate<"Subtarget->hasSSEPrefetch()">;
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def NoSSEPrefetch : Predicate<"!Subtarget->hasSSEPrefetch()">;
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def HasPRFCHW : Predicate<"Subtarget->hasPRFCHW()">;
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def HasPREFETCHI : Predicate<"Subtarget->hasPREFETCHI()">;
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def HasPrefetchW : Predicate<"Subtarget->hasPrefetchW()">;
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def HasPREFETCHWT1 : Predicate<"Subtarget->hasPREFETCHWT1()">;
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def HasLAHFSAHF : Predicate<"Subtarget->hasLAHFSAHF()">;
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def HasLAHFSAHF64 : Predicate<"Subtarget->hasLAHFSAHF64()">;
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def HasMWAITX : Predicate<"Subtarget->hasMWAITX()">;
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def HasCLZERO : Predicate<"Subtarget->hasCLZERO()">;
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def HasCLDEMOTE : Predicate<"Subtarget->hasCLDEMOTE()">;
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def HasMOVDIRI : Predicate<"Subtarget->hasMOVDIRI()">;
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def HasMOVDIR64B : Predicate<"Subtarget->hasMOVDIR64B()">;
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def HasPTWRITE : Predicate<"Subtarget->hasPTWRITE()">;
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def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
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def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;
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def HasSHSTK : Predicate<"Subtarget->hasSHSTK()">;
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def HasSM4 : Predicate<"Subtarget->hasSM4()">;
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def HasCLFLUSH : Predicate<"Subtarget->hasCLFLUSH()">;
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def HasCLFLUSHOPT : Predicate<"Subtarget->hasCLFLUSHOPT()">;
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def HasCLWB : Predicate<"Subtarget->hasCLWB()">;
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def HasWBNOINVD : Predicate<"Subtarget->hasWBNOINVD()">;
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def HasRDPID : Predicate<"Subtarget->hasRDPID()">;
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def HasRDPRU : Predicate<"Subtarget->hasRDPRU()">;
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def HasWAITPKG : Predicate<"Subtarget->hasWAITPKG()">;
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def HasINVPCID : Predicate<"Subtarget->hasINVPCID()">;
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def HasCX8 : Predicate<"Subtarget->hasCX8()">;
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def HasCX16 : Predicate<"Subtarget->hasCX16()">;
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def HasPCONFIG : Predicate<"Subtarget->hasPCONFIG()">;
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def HasENQCMD : Predicate<"Subtarget->hasENQCMD()">;
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def HasAMXFP16 : Predicate<"Subtarget->hasAMXFP16()">;
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def HasCMPCCXADD : Predicate<"Subtarget->hasCMPCCXADD()">;
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def HasAVXNECONVERT : Predicate<"Subtarget->hasAVXNECONVERT()">;
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def HasKL : Predicate<"Subtarget->hasKL()">;
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def HasRAOINT : Predicate<"Subtarget->hasRAOINT()">;
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def HasWIDEKL : Predicate<"Subtarget->hasWIDEKL()">;
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def HasHRESET : Predicate<"Subtarget->hasHRESET()">;
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def HasSERIALIZE : Predicate<"Subtarget->hasSERIALIZE()">;
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def HasTSXLDTRK : Predicate<"Subtarget->hasTSXLDTRK()">;
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def HasAMXTILE : Predicate<"Subtarget->hasAMXTILE()">;
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def HasAMXBF16 : Predicate<"Subtarget->hasAMXBF16()">;
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def HasAMXINT8 : Predicate<"Subtarget->hasAMXINT8()">;
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def HasAMXCOMPLEX : Predicate<"Subtarget->hasAMXCOMPLEX()">;
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def HasUINTR : Predicate<"Subtarget->hasUINTR()">;
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def HasUSERMSR : Predicate<"Subtarget->hasUSERMSR()">;
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def HasCRC32 : Predicate<"Subtarget->hasCRC32()">;
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def HasX86_64 : Predicate<"Subtarget->hasX86_64()">;
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def Not64BitMode : Predicate<"!Subtarget->is64Bit()">,
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AssemblerPredicate<(all_of (not Is64Bit)), "Not 64-bit mode">;
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def In64BitMode : Predicate<"Subtarget->is64Bit()">,
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AssemblerPredicate<(all_of Is64Bit), "64-bit mode">;
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def IsLP64 : Predicate<"Subtarget->isTarget64BitLP64()">;
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def NotLP64 : Predicate<"!Subtarget->isTarget64BitLP64()">;
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def In16BitMode : Predicate<"Subtarget->is16Bit()">,
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AssemblerPredicate<(all_of Is16Bit), "16-bit mode">;
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def Not16BitMode : Predicate<"!Subtarget->is16Bit()">,
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AssemblerPredicate<(all_of (not Is16Bit)), "Not 16-bit mode">;
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def In32BitMode : Predicate<"Subtarget->is32Bit()">,
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AssemblerPredicate<(all_of Is32Bit), "32-bit mode">;
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def IsWin64 : Predicate<"Subtarget->isTargetWin64()">;
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def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">;
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def NotWin64WithoutFP : Predicate<"!Subtarget->isTargetWin64() ||"
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"Subtarget->getFrameLowering()->hasFP(*MF)"> {
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let RecomputePerFunction = 1;
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}
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def IsPS : Predicate<"Subtarget->isTargetPS()">;
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def NotPS : Predicate<"!Subtarget->isTargetPS()">;
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def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
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def NotNaCl : Predicate<"!Subtarget->isTargetNaCl()">;
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def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;
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def KernelCode : Predicate<"TM.getCodeModel() == CodeModel::Kernel">;
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def NearData : Predicate<"TM.getCodeModel() == CodeModel::Small ||"
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"TM.getCodeModel() == CodeModel::Kernel">;
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def IsNotPIC : Predicate<"!TM.isPositionIndependent()">;
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// We could compute these on a per-module basis but doing so requires accessing
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// the Function object through the <Target>Subtarget and objections were raised
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// to that (see post-commit review comments for r301750).
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let RecomputePerFunction = 1 in {
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def OptForSize : Predicate<"shouldOptForSize(MF)">;
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def OptForMinSize : Predicate<"MF->getFunction().hasMinSize()">;
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def OptForSpeed : Predicate<"!shouldOptForSize(MF)">;
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def UseIncDec : Predicate<"!Subtarget->slowIncDec() || "
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"shouldOptForSize(MF)">;
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def NoSSE41_Or_OptForSize : Predicate<"shouldOptForSize(MF) || "
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"!Subtarget->hasSSE41()">;
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}
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def CallImmAddr : Predicate<"Subtarget->isLegalToCallImmediateAddr()">;
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def FavorMemIndirectCall : Predicate<"!Subtarget->slowTwoMemOps()">;
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def HasFastMem32 : Predicate<"!Subtarget->isUnalignedMem32Slow()">;
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def HasFastLZCNT : Predicate<"Subtarget->hasFastLZCNT()">;
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def HasFastSHLDRotate : Predicate<"Subtarget->hasFastSHLDRotate()">;
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def HasERMSB : Predicate<"Subtarget->hasERMSB()">;
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def HasFSRM : Predicate<"Subtarget->hasFSRM()">;
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def HasMFence : Predicate<"Subtarget->hasMFence()">;
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def UseIndirectThunkCalls : Predicate<"Subtarget->useIndirectThunkCalls()">;
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def NotUseIndirectThunkCalls : Predicate<"!Subtarget->useIndirectThunkCalls()">;
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