225 lines
7.6 KiB
C++
225 lines
7.6 KiB
C++
//===-- XtensaMCAsmBackend.cpp - Xtensa assembler backend -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/XtensaFixupKinds.h"
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#include "MCTargetDesc/XtensaMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace llvm {
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class MCObjectTargetWriter;
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class XtensaMCAsmBackend : public MCAsmBackend {
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uint8_t OSABI;
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bool IsLittleEndian;
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public:
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XtensaMCAsmBackend(uint8_t osABI, bool isLE)
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: MCAsmBackend(llvm::endianness::little), OSABI(osABI),
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IsLittleEndian(isLE) {}
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unsigned getNumFixupKinds() const override {
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return Xtensa::NumTargetFixupKinds;
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}
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override;
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bool mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const override;
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *Fragment,
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const MCAsmLayout &Layout) const override;
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void relaxInstruction(MCInst &Inst,
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const MCSubtargetInfo &STI) const override;
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bool writeNopData(raw_ostream &OS, uint64_t Count,
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const MCSubtargetInfo *STI) const override;
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std::unique_ptr<MCObjectTargetWriter> createObjectTargetWriter() const override {
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return createXtensaObjectWriter(OSABI, IsLittleEndian);
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}
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};
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} // namespace llvm
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const MCFixupKindInfo &
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XtensaMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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const static MCFixupKindInfo Infos[Xtensa::NumTargetFixupKinds] = {
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// name offset bits flags
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{"fixup_xtensa_branch_6", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
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{"fixup_xtensa_branch_8", 16, 8, MCFixupKindInfo::FKF_IsPCRel},
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{"fixup_xtensa_branch_12", 12, 12, MCFixupKindInfo::FKF_IsPCRel},
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{"fixup_xtensa_jump_18", 6, 18, MCFixupKindInfo::FKF_IsPCRel},
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{"fixup_xtensa_call_18", 6, 18,
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MCFixupKindInfo::FKF_IsPCRel |
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MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
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{"fixup_xtensa_l32r_16", 8, 16,
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MCFixupKindInfo::FKF_IsPCRel |
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MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
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MCContext &Ctx) {
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unsigned Kind = Fixup.getKind();
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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case FK_Data_8:
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return Value;
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case Xtensa::fixup_xtensa_branch_6: {
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Value -= 4;
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if (!isInt<6>(Value))
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Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
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unsigned Hi2 = (Value >> 4) & 0x3;
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unsigned Lo4 = Value & 0xf;
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return (Hi2 << 4) | (Lo4 << 12);
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}
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case Xtensa::fixup_xtensa_branch_8:
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Value -= 4;
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if (!isInt<8>(Value))
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Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
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return (Value & 0xff);
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case Xtensa::fixup_xtensa_branch_12:
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Value -= 4;
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if (!isInt<12>(Value))
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Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
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return (Value & 0xfff);
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case Xtensa::fixup_xtensa_jump_18:
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Value -= 4;
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if (!isInt<18>(Value))
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Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
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return (Value & 0x3ffff);
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case Xtensa::fixup_xtensa_call_18:
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Value -= 4;
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if (!isInt<20>(Value))
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Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
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if (Value & 0x3)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned");
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return (Value & 0xffffc) >> 2;
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case Xtensa::fixup_xtensa_l32r_16:
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unsigned Offset = Fixup.getOffset();
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if (Offset & 0x3)
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Value -= 4;
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if (!isInt<18>(Value) && (Value & 0x20000))
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Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
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if (Value & 0x3)
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Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned");
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return (Value & 0x3fffc) >> 2;
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}
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}
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static unsigned getSize(unsigned Kind) {
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switch (Kind) {
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default:
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return 3;
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case MCFixupKind::FK_Data_4:
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return 4;
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case Xtensa::fixup_xtensa_branch_6:
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return 2;
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}
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}
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void XtensaMCAsmBackend::applyFixup(const MCAssembler &Asm,
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const MCFixup &Fixup, const MCValue &Target,
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MutableArrayRef<char> Data, uint64_t Value,
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bool IsResolved,
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const MCSubtargetInfo *STI) const {
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MCContext &Ctx = Asm.getContext();
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MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
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Value = adjustFixupValue(Fixup, Value, Ctx);
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// Shift the value into position.
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Value <<= Info.TargetOffset;
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if (!Value)
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return; // Doesn't change encoding.
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unsigned Offset = Fixup.getOffset();
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unsigned FullSize = getSize(Fixup.getKind());
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for (unsigned i = 0; i != FullSize; ++i) {
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Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
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}
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}
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bool XtensaMCAsmBackend::mayNeedRelaxation(const MCInst &Inst,
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const MCSubtargetInfo &STI) const {
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return false;
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}
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bool XtensaMCAsmBackend::fixupNeedsRelaxation(
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const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *Fragment,
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const MCAsmLayout &Layout) const {
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return false;
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}
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void XtensaMCAsmBackend::relaxInstruction(MCInst &Inst,
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const MCSubtargetInfo &STI) const {}
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bool XtensaMCAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
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const MCSubtargetInfo *STI) const {
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uint64_t NumNops24b = Count / 3;
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for (uint64_t i = 0; i != NumNops24b; ++i) {
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// Currently just little-endian machine supported,
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// but probably big-endian will be also implemented in future
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if (IsLittleEndian) {
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OS.write("\xf0", 1);
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OS.write("\x20", 1);
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OS.write("\0x00", 1);
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} else {
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report_fatal_error("Big-endian mode currently is not supported!");
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}
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Count -= 3;
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}
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// TODO maybe function should return error if (Count > 0)
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switch (Count) {
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default:
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break;
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case 1:
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OS.write("\0", 1);
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break;
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case 2:
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// NOP.N instruction
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OS.write("\x3d", 1);
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OS.write("\xf0", 1);
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break;
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}
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return true;
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}
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MCAsmBackend *llvm::createXtensaMCAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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uint8_t OSABI =
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MCELFObjectTargetWriter::getOSABI(STI.getTargetTriple().getOS());
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return new llvm::XtensaMCAsmBackend(OSABI, true);
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}
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