350 lines
10 KiB
C++
350 lines
10 KiB
C++
//===- XtensaInstPrinter.cpp - Convert Xtensa MCInst to asm syntax --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an Xtensa MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "XtensaInstPrinter.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegister.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#include "XtensaGenAsmWriter.inc"
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static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
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int Offset = 0;
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const MCSymbolRefExpr *SRE;
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if (!(SRE = cast<MCSymbolRefExpr>(Expr)))
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assert(false && "Unexpected MCExpr type.");
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MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
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switch (Kind) {
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case MCSymbolRefExpr::VK_None:
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break;
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// TODO
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default:
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report_fatal_error("Invalid kind!");
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}
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OS << SRE->getSymbol();
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if (Offset) {
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if (Offset > 0)
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OS << '+';
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OS << Offset;
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}
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if (Kind != MCSymbolRefExpr::VK_None)
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OS << ')';
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}
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void XtensaInstPrinter::printOperand(const MCOperand &MC, raw_ostream &O) {
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if (MC.isReg())
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O << getRegisterName(MC.getReg());
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else if (MC.isImm())
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O << MC.getImm();
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else if (MC.isExpr())
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printExpr(MC.getExpr(), O);
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else
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report_fatal_error("Invalid operand");
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}
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void XtensaInstPrinter::printInst(const MCInst *MI, uint64_t Address,
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StringRef Annot, const MCSubtargetInfo &STI,
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raw_ostream &O) {
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printInstruction(MI, Address, O);
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printAnnotation(O, Annot);
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}
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void XtensaInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) const {
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O << getRegisterName(Reg);
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}
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void XtensaInstPrinter::printOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printOperand(MI->getOperand(OpNum), O);
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}
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void XtensaInstPrinter::printMemOperand(const MCInst *MI, int OpNum,
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raw_ostream &OS) {
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OS << getRegisterName(MI->getOperand(OpNum).getReg());
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OS << ", ";
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printOperand(MI, OpNum + 1, OS);
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}
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void XtensaInstPrinter::printBranchTarget(const MCInst *MI, int OpNum,
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raw_ostream &OS) {
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const MCOperand &MC = MI->getOperand(OpNum);
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Val = MC.getImm() + 4;
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OS << ". ";
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if (Val > 0)
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OS << '+';
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OS << Val;
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} else if (MC.isExpr())
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MC.getExpr()->print(OS, &MAI, true);
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else
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llvm_unreachable("Invalid operand");
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}
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void XtensaInstPrinter::printJumpTarget(const MCInst *MI, int OpNum,
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raw_ostream &OS) {
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const MCOperand &MC = MI->getOperand(OpNum);
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if (MC.isImm()) {
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int64_t Val = MC.getImm() + 4;
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OS << ". ";
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if (Val > 0)
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OS << '+';
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OS << Val;
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} else if (MC.isExpr())
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MC.getExpr()->print(OS, &MAI, true);
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else
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llvm_unreachable("Invalid operand");
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;
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}
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void XtensaInstPrinter::printCallOperand(const MCInst *MI, int OpNum,
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raw_ostream &OS) {
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const MCOperand &MC = MI->getOperand(OpNum);
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if (MC.isImm()) {
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int64_t Val = MC.getImm() + 4;
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OS << ". ";
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if (Val > 0)
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OS << '+';
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OS << Val;
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} else if (MC.isExpr())
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MC.getExpr()->print(OS, &MAI, true);
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else
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llvm_unreachable("Invalid operand");
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}
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void XtensaInstPrinter::printL32RTarget(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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const MCOperand &MC = MI->getOperand(OpNum);
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if (MC.isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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int64_t InstrOff = Value & 0x3;
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Value -= InstrOff;
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assert((Value >= -262144 && Value <= -4) &&
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"Invalid argument, value must be in ranges [-262144,-4]");
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Value += ((InstrOff + 0x3) & 0x4) - InstrOff;
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O << ". ";
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O << Value;
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} else if (MC.isExpr())
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MC.getExpr()->print(O, &MAI, true);
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else
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llvm_unreachable("Invalid operand");
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}
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void XtensaInstPrinter::printImm8_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert(isInt<8>(Value) &&
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"Invalid argument, value must be in ranges [-128,127]");
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O << Value;
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} else {
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printOperand(MI, OpNum, O);
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}
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}
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void XtensaInstPrinter::printImm8_sh8_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((isInt<16>(Value) && ((Value & 0xFF) == 0)) &&
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"Invalid argument, value must be multiples of 256 in range "
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"[-32768,32512]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printImm12_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= -2048 && Value <= 2047) &&
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"Invalid argument, value must be in ranges [-2048,2047]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printImm12m_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= -2048 && Value <= 2047) &&
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"Invalid argument, value must be in ranges [-2048,2047]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printUimm4_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 0 && Value <= 15) && "Invalid argument");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printUimm5_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 0 && Value <= 31) && "Invalid argument");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printShimm1_31_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 1 && Value <= 31) &&
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"Invalid argument, value must be in range [1,31]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printImm1_16_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 1 && Value <= 16) &&
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"Invalid argument, value must be in range [1,16]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printOffset8m8_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 0 && Value <= 255) &&
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"Invalid argument, value must be in range [0,255]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printOffset8m16_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 0 && Value <= 510 && ((Value & 0x1) == 0)) &&
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"Invalid argument, value must be multiples of two in range [0,510]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printOffset8m32_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert(
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(Value >= 0 && Value <= 1020 && ((Value & 0x3) == 0)) &&
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"Invalid argument, value must be multiples of four in range [0,1020]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printOffset4m32_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert((Value >= 0 && Value <= 60 && ((Value & 0x3) == 0)) &&
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"Invalid argument, value must be multiples of four in range [0,60]");
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printB4const_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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switch (Value) {
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case -1:
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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case 6:
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case 7:
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case 8:
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case 10:
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case 12:
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case 16:
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case 32:
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case 64:
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case 128:
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case 256:
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break;
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default:
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assert((0) && "Invalid B4const argument");
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}
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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void XtensaInstPrinter::printB4constu_AsmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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if (MI->getOperand(OpNum).isImm()) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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switch (Value) {
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case 32768:
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case 65536:
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case 2:
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case 3:
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case 4:
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case 5:
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case 6:
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case 7:
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case 8:
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case 10:
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case 12:
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case 16:
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case 32:
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case 64:
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case 128:
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case 256:
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break;
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default:
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assert((0) && "Invalid B4constu argument");
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}
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O << Value;
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} else
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printOperand(MI, OpNum, O);
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}
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