133 lines
4.7 KiB
YAML
133 lines
4.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @sdiv_exact() { ret void }
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define void @sdiv_noexact() { ret void }
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define void @sdiv_exact_minsize() #0 { ret void }
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define void @div_v4s32() { ret void }
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define void @div_v4s32_splat() { ret void }
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attributes #0 = { minsize }
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...
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---
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name: sdiv_exact
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: sdiv_exact
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -991146299
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; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = exact G_ASHR [[COPY]], [[C]](s32)
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; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[ASHR]], [[C1]]
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; CHECK-NEXT: $w0 = COPY [[MUL]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%1:_(s32) = G_CONSTANT i32 104
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%2:_(s32) = exact G_SDIV %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: sdiv_noexact
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: sdiv_noexact
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 104
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; CHECK-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY]], [[C]]
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; CHECK-NEXT: $w0 = COPY [[SDIV]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%1:_(s32) = G_CONSTANT i32 104
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%2:_(s32) = G_SDIV %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: sdiv_exact_minsize
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: sdiv_exact_minsize
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 104
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; CHECK-NEXT: [[SDIV:%[0-9]+]]:_(s32) = exact G_SDIV [[COPY]], [[C]]
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; CHECK-NEXT: $w0 = COPY [[SDIV]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:_(s32) = COPY $w0
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%1:_(s32) = G_CONSTANT i32 104
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%2:_(s32) = exact G_SDIV %0, %1
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$w0 = COPY %2(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: div_v4s32
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body: |
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bb.1:
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liveins: $q0
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; CHECK-LABEL: name: div_v4s32
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; CHECK: liveins: $q0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -991146299
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 954437177
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
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; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C2]](s32), [[C1]](s32), [[C2]](s32)
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; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(<4 x s32>) = exact G_ASHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
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; CHECK-NEXT: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[ASHR]], [[BUILD_VECTOR1]]
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; CHECK-NEXT: $q0 = COPY [[MUL]](<4 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%c1:_(s32) = G_CONSTANT i32 104
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%c2:_(s32) = G_CONSTANT i32 72
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%1:_(<4 x s32>) = G_BUILD_VECTOR %c1(s32), %c2(s32), %c1(s32), %c2(s32)
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%3:_(<4 x s32>) = exact G_SDIV %0, %1
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: div_v4s32_splat
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body: |
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bb.1:
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liveins: $q0
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; CHECK-LABEL: name: div_v4s32_splat
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; CHECK: liveins: $q0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -991146299
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
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; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)
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; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(<4 x s32>) = exact G_ASHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
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; CHECK-NEXT: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[ASHR]], [[BUILD_VECTOR1]]
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; CHECK-NEXT: $q0 = COPY [[MUL]](<4 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%c1:_(s32) = G_CONSTANT i32 104
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%1:_(<4 x s32>) = G_BUILD_VECTOR %c1(s32), %c1(s32), %c1(s32), %c1(s32)
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%3:_(<4 x s32>) = exact G_SDIV %0, %1
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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