208 lines
7.8 KiB
YAML
208 lines
7.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
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# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-uknown -global-isel-abort=1 -run-pass=instruction-select %s -o - | FileCheck %s
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...
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---
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name: uadde_s64
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0, $x1
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; CHECK-LABEL: name: uadde_s64
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; CHECK: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32common = MOVi32imm 1
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[MOVi32imm]], 1, 0, implicit-def $nzcv
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; CHECK-NEXT: [[ADCSXr:%[0-9]+]]:gpr64 = ADCSXr [[COPY]], [[COPY1]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
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; CHECK-NEXT: $x0 = COPY [[ADCSXr]]
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; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w1
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%2:gpr(s32) = G_CONSTANT i32 1
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%3:gpr(s64), %4:gpr(s32) = G_UADDE %0, %1, %2
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$x0 = COPY %3(s64)
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$w1 = COPY %4(s32)
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RET_ReallyLR implicit $x0, implicit $w1
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...
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...
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---
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name: uadde_s32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $w0, $w1
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; CHECK-LABEL: name: uadde_s32
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32common = MOVi32imm 1
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[MOVi32imm]], 1, 0, implicit-def $nzcv
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; CHECK-NEXT: [[ADCSWr:%[0-9]+]]:gpr32 = ADCSWr [[COPY]], [[COPY1]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
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; CHECK-NEXT: $w0 = COPY [[ADCSWr]]
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; CHECK-NEXT: $w1 = COPY [[CSINCWr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1
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%0:gpr(s32) = COPY $w0
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%1:gpr(s32) = COPY $w1
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%2:gpr(s32) = G_CONSTANT i32 1
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%3:gpr(s32), %4:gpr(s32) = G_UADDE %0, %1, %2
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$w0 = COPY %3(s32)
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$w1 = COPY %4(s32)
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RET_ReallyLR implicit $w0, implicit $w1
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...
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...
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---
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name: uadde_opt_prev_uaddo
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0, $x1, $x2, $x3
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; CHECK-LABEL: name: uadde_opt_prev_uaddo
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; CHECK: liveins: $x0, $x1, $x2, $x3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3
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; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY2]], implicit-def $nzcv
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; CHECK-NEXT: [[ADCSXr:%[0-9]+]]:gpr64 = ADCSXr [[COPY1]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: $x0 = COPY [[ADDSXrr]]
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; CHECK-NEXT: $x1 = COPY [[ADCSXr]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%2:gpr(s64) = COPY $x2
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%3:gpr(s64) = COPY $x3
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%8:gpr(s64), %12:gpr(s32) = G_UADDO %0, %2
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%9:gpr(s64), %13:gpr(s32) = G_UADDE %1, %3, %12
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$x0 = COPY %8(s64)
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$x1 = COPY %9(s64)
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RET_ReallyLR implicit $x0, implicit $x1
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...
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...
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---
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name: uadde_opt_prev_uadde
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0, $x1, $x2, $x3
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; CHECK-LABEL: name: uadde_opt_prev_uadde
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; CHECK: liveins: $x0, $x1, $x2, $x3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32common = MOVi32imm 1
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[MOVi32imm]], 1, 0, implicit-def $nzcv
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; CHECK-NEXT: [[ADCSXr:%[0-9]+]]:gpr64 = ADCSXr [[COPY]], [[COPY2]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: [[ADCSXr1:%[0-9]+]]:gpr64 = ADCSXr [[COPY1]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: $x0 = COPY [[ADCSXr]]
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; CHECK-NEXT: $x1 = COPY [[ADCSXr1]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%2:gpr(s64) = COPY $x2
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%3:gpr(s64) = COPY $x3
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%6:gpr(s32) = G_CONSTANT i32 1
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%8:gpr(s64), %12:gpr(s32) = G_UADDE %0, %2, %6
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%9:gpr(s64), %13:gpr(s32) = G_UADDE %1, %3, %12
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$x0 = COPY %8(s64)
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$x1 = COPY %9(s64)
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RET_ReallyLR implicit $x0, implicit $x1
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...
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...
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---
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name: uadde_opt_bail_clobber
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0, $x1, $x2, $x4, $x5, $x6
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; CHECK-LABEL: name: uadde_opt_bail_clobber
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; CHECK: liveins: $x0, $x1, $x2, $x4, $x5, $x6
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x4
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; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64 = COPY $x5
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; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr64 = COPY $x6
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; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY3]], implicit-def $nzcv
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; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32common = CSINCWr $wzr, $wzr, 3, implicit $nzcv
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; CHECK-NEXT: [[ADCSXr:%[0-9]+]]:gpr64 = ADCSXr [[COPY1]], [[COPY4]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[CSINCWr]], 1, 0, implicit-def $nzcv
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; CHECK-NEXT: [[ADCSXr1:%[0-9]+]]:gpr64 = ADCSXr [[COPY2]], [[COPY5]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: $x0 = COPY [[ADDSXrr]]
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; CHECK-NEXT: $x1 = COPY [[ADCSXr]]
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; CHECK-NEXT: $x2 = COPY [[ADCSXr1]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1, implicit $x2
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%2:gpr(s64) = COPY $x2
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%4:gpr(s64) = COPY $x4
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%5:gpr(s64) = COPY $x5
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%6:gpr(s64) = COPY $x6
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%7:gpr(s64), %11:gpr(s32) = G_UADDO %0, %4
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%8:gpr(s64), %12:gpr(s32) = G_UADDE %1, %5, %11
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; carry-in is not produced by previous instruction
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%9:gpr(s64), %13:gpr(s32) = G_UADDE %2, %6, %11
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$x0 = COPY %7(s64)
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$x1 = COPY %8(s64)
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$x2 = COPY %9(s64)
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RET_ReallyLR implicit $x0, implicit $x1, implicit $x2
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...
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...
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---
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name: uadde_opt_prev_dead
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $x0, $x1, $x2, $x3
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; CHECK-LABEL: name: uadde_opt_prev_dead
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; CHECK: liveins: $x0, $x1, $x2, $x3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3
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; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY2]], implicit-def $nzcv
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; CHECK-NEXT: [[ADCSXr:%[0-9]+]]:gpr64 = ADCSXr [[COPY1]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
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; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
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; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:gpr(s64) = COPY $x0
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%1:gpr(s64) = COPY $x1
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%2:gpr(s64) = COPY $x2
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%3:gpr(s64) = COPY $x3
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%4:gpr(s64), %5:gpr(s32) = G_UADDO %0, %2
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%6:gpr(s64), %7:gpr(s32) = G_UADDE %1, %3, %5
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$w0 = COPY %7(s32)
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RET_ReallyLR implicit $w0
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...
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