65 lines
2.3 KiB
LLVM
65 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=neoverse-n1 < %s | FileCheck %s
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target triple = "aarch64-linux-unknown"
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define void @add_i256(i64 %x0, i64 %x1, i64 %x2, i64 %x3, i64 %y1, i64 %y2, i64 %y3, i8* %store_addr_ptr) {
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; CHECK-LABEL: add_i256:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adds x8, x0, #1
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; CHECK-NEXT: adcs x9, x1, x4
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; CHECK-NEXT: stp x8, x9, [x7]
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; CHECK-NEXT: adcs x8, x2, x5
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; CHECK-NEXT: adc x9, x3, x6
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; CHECK-NEXT: stp x8, x9, [x7, #16]
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; CHECK-NEXT: ret
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entry:
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; Build x_256 = x0 | x1 << 64 | x2 << 128 | x3 << 192
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%temp = zext i64 %x0 to i256
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%temp57 = zext i64 %x1 to i256
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%temp58 = zext i64 %x2 to i256
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%temp59 = zext i64 %x3 to i256
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%temp_shifted = shl i256 %temp, 0
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%temp_shifted60 = shl i256 %temp57, 64
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%temp_shifted61 = shl i256 %temp58, 128
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%temp_shifted62 = shl i256 %temp59, 192
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%x = or i256 %temp_shifted, %temp_shifted60
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%x63 = or i256 %x, %temp_shifted61
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%x_big = or i256 %x63, %temp_shifted62
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; Build y_256 = 1 | y1 << 64 | y2 << 128 | y3 << 192
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%temp65 = zext i64 %y1 to i256
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%temp66 = zext i64 %y2 to i256
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%temp67 = zext i64 %y3 to i256
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%temp_shifted68 = shl i256 %temp65, 64
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%temp_shifted69 = shl i256 %temp66, 128
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%temp_shifted70 = shl i256 %temp67, 192
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%y = or i256 1, %temp_shifted68
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%y71 = or i256 %y, %temp_shifted69
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%y_big = or i256 %y71, %temp_shifted70
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; z_256 = x_256 + y_256
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%z_256 = add i256 %x_big, %y_big
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; split z_256 into 4 64-bit registers
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%split_64bits = lshr i256 %z_256, 0
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%z0 = trunc i256 %split_64bits to i64
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%split_64bits74 = lshr i256 %z_256, 64
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%z1 = trunc i256 %split_64bits74 to i64
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%split_64bits76 = lshr i256 %z_256, 128
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%z2 = trunc i256 %split_64bits76 to i64
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%split_64bits78 = lshr i256 %z_256, 192
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%z3 = trunc i256 %split_64bits78 to i64
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%outptr0 = bitcast i8* %store_addr_ptr to i64*
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store i64 %z0, i64* %outptr0, align 4
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%gep = getelementptr i8, i8* %store_addr_ptr, i64 8
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%outptr1 = bitcast i8* %gep to i64*
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store i64 %z1, i64* %outptr1, align 4
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%store_addr_ofs = getelementptr i8, i8* %store_addr_ptr, i64 16
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%outptr081 = bitcast i8* %store_addr_ofs to i64*
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store i64 %z2, i64* %outptr081, align 4
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%gep82 = getelementptr i8, i8* %store_addr_ofs, i64 8
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%outptr183 = bitcast i8* %gep82 to i64*
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store i64 %z3, i64* %outptr183, align 4
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ret void
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}
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