1455 lines
56 KiB
YAML
1455 lines
56 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills -aarch64-enable-sink-fold=true %s -o - 2>&1 | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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%struct.A = type { i32, i32, i32, i32, i32, i32 }
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@A = external dso_local global [100 x i32], align 4
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define void @cant_sink_adds_call_in_block(ptr nocapture readonly %input, ptr %a) {
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bb:
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%i = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 1
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%i1 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 2
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%i2 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 3
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%i3 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 4
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%i4 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 5
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%scevgep = getelementptr i8, ptr %input, i64 1
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br label %.backedge
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.backedge: ; preds = %.backedge.backedge, %bb
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%lsr.iv = phi ptr [ %scevgep1, %.backedge.backedge ], [ %scevgep, %bb ]
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%i5 = load i8, ptr %lsr.iv, align 1
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%i6 = zext i8 %i5 to i32
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switch i32 %i6, label %.backedge.backedge [
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i32 0, label %bb7
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i32 10, label %bb9
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i32 20, label %bb10
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i32 30, label %bb11
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i32 40, label %bb12
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i32 50, label %bb13
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]
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bb7: ; preds = %.backedge
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tail call void @_Z6assignPj(ptr %a)
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br label %.backedge.backedge
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bb9: ; preds = %.backedge
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tail call void @_Z6assignPj(ptr %i)
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br label %.backedge.backedge
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bb10: ; preds = %.backedge
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tail call void @_Z6assignPj(ptr %i1)
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br label %.backedge.backedge
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bb11: ; preds = %.backedge
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tail call void @_Z6assignPj(ptr %i2)
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br label %.backedge.backedge
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bb12: ; preds = %.backedge
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tail call void @_Z6assignPj(ptr %i3)
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br label %.backedge.backedge
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bb13: ; preds = %.backedge
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tail call void @_Z6assignPj(ptr %i4)
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br label %.backedge.backedge
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.backedge.backedge: ; preds = %bb13, %bb12, %bb11, %bb10, %bb9, %bb7, %.backedge
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%scevgep1 = getelementptr i8, ptr %lsr.iv, i64 1
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br label %.backedge
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}
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define i32 @load_not_safe_to_move_consecutive_call(i32 %n) {
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i = load i32, ptr @A, align 4
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%call0 = tail call i32 @use(i32 %n)
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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ret i32 %sum.0.lcssa
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.065, %i
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define i32 @load_not_safe_to_move_consecutive_call_use(i32 %n) {
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i = load i32, ptr @A, align 4
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%call0 = tail call i32 @use(i32 %i)
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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ret i32 %sum.0.lcssa
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.065, %i
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define i32 @cant_sink_use_outside_loop(i32 %n) {
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i = load i32, ptr @A, align 4
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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%use.outside.loop = phi i32 [ 0, %entry ], [ %i, %for.body ]
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%call = tail call i32 @use(i32 %use.outside.loop)
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ret i32 %sum.0.lcssa
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.065, %sum.065
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define i32 @use_is_not_a_copy(i32 %n) {
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entry:
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%cmp63 = icmp sgt i32 %n, 0
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br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i = load i32, ptr @A, align 4
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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ret i32 %sum.0.lcssa
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.065, %i
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%lsr.iv.next = add i32 %lsr.iv, -1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define dso_local void @sink_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, i32 %n) local_unnamed_addr {
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entry:
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%i = load i32, ptr %read, align 4, !tbaa !0
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%cmp10 = icmp sgt i32 %n, 0
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br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i1 = add i32 %i, 42
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0
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ret void
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.011, %lsr.iv1
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%lsr.iv.next = add i32 %lsr.iv, -1
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%lsr.iv.next2 = add i32 %lsr.iv1, 1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define dso_local void @store_after_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, ptr nocapture %store, i32 %n) local_unnamed_addr {
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entry:
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%i = load i32, ptr %read, align 4, !tbaa !0
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%cmp10 = icmp sgt i32 %n, 0
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br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i1 = add i32 %i, 42
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store i32 43, ptr %store, align 4, !tbaa !0
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0
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ret void
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.011, %lsr.iv1
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%lsr.iv.next = add i32 %lsr.iv, -1
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%lsr.iv.next2 = add i32 %lsr.iv1, 1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !4
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}
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define dso_local void @aliased_store_after_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, ptr nocapture %store, i32 %n) local_unnamed_addr {
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entry:
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%i = load i32, ptr %read, align 4, !tbaa !0
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%cmp10 = icmp sgt i32 %n, 0
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br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%i1 = add i32 %i, 42
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store i32 43, ptr %read, align 4, !tbaa !0
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
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store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0
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ret void
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for.body: ; preds = %for.body, %for.body.preheader
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%lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]
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%lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
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%sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
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%div = sdiv i32 %sum.011, %lsr.iv1
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%lsr.iv.next = add i32 %lsr.iv, -1
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%lsr.iv.next2 = add i32 %lsr.iv1, 1
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%exitcond.not = icmp eq i32 %lsr.iv.next, 0
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !4
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}
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declare i32 @use(i32)
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declare void @_Z6assignPj(ptr)
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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!4 = distinct !{!4, !5}
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!5 = !{!"llvm.loop.mustprogress"}
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...
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---
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name: cant_sink_adds_call_in_block
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers:
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- { id: 0, class: gpr64all, preferred-register: '' }
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- { id: 1, class: gpr64all, preferred-register: '' }
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- { id: 2, class: gpr64all, preferred-register: '' }
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- { id: 3, class: gpr64all, preferred-register: '' }
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- { id: 4, class: gpr64all, preferred-register: '' }
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- { id: 5, class: gpr64all, preferred-register: '' }
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- { id: 6, class: gpr64sp, preferred-register: '' }
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- { id: 7, class: gpr64all, preferred-register: '' }
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- { id: 8, class: gpr64common, preferred-register: '' }
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- { id: 9, class: gpr64common, preferred-register: '' }
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- { id: 10, class: gpr64sp, preferred-register: '' }
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- { id: 11, class: gpr64sp, preferred-register: '' }
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- { id: 12, class: gpr64sp, preferred-register: '' }
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- { id: 13, class: gpr64sp, preferred-register: '' }
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- { id: 14, class: gpr64sp, preferred-register: '' }
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- { id: 15, class: gpr64sp, preferred-register: '' }
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- { id: 16, class: gpr64, preferred-register: '' }
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- { id: 17, class: gpr32, preferred-register: '' }
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- { id: 18, class: gpr32sp, preferred-register: '' }
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- { id: 19, class: gpr32, preferred-register: '' }
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- { id: 20, class: gpr64common, preferred-register: '' }
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- { id: 21, class: gpr64, preferred-register: '' }
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- { id: 22, class: gpr64sp, preferred-register: '' }
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- { id: 23, class: gpr64sp, preferred-register: '' }
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liveins:
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- { reg: '$x0', virtual-reg: '%8' }
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- { reg: '$x1', virtual-reg: '%9' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1
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adjustsStack: true
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack: []
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callSites: []
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debugValueSubstitutions: []
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constants: []
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machineFunctionInfo: {}
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jumpTable:
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kind: block-address
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entries:
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- id: 0
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blocks: [ '%bb.2', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
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'%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.3', '%bb.8',
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'%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
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'%bb.8', '%bb.8', '%bb.4', '%bb.8', '%bb.8', '%bb.8',
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'%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
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'%bb.5', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
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'%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.6', '%bb.8',
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'%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
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'%bb.8', '%bb.8', '%bb.7' ]
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body: |
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; CHECK-LABEL: name: cant_sink_adds_call_in_block
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; CHECK: bb.0.bb:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x1
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x0
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; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri [[COPY1]], 1, 0
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY [[ADDXri]]
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; CHECK-NEXT: [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1..backedge:
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; CHECK-NEXT: successors: %bb.9(0x09249249), %bb.2(0x76db6db7)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr64sp = PHI [[COPY2]], %bb.0, %7, %bb.9
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; CHECK-NEXT: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[PHI]], 0 :: (load (s8) from %ir.lsr.iv)
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, killed [[LDRBBui]], %subreg.sub_32
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; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32sp = COPY [[SUBREG_TO_REG]].sub_32
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; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[COPY3]], 50, 0, implicit-def $nzcv
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; CHECK-NEXT: Bcc 8, %bb.9, implicit $nzcv
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2..backedge:
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; CHECK-NEXT: successors: %bb.3(0x13b13b14), %bb.9(0x09d89d8a), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14), %bb.8(0x13b13b14)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
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; CHECK-NEXT: BR killed %21
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3.bb7:
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; CHECK-NEXT: successors: %bb.9(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
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; CHECK-NEXT: $x0 = COPY [[COPY]]
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; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.9
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.4.bb9:
|
|
; CHECK-NEXT: successors: %bb.9(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 4, 0
|
|
; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.9
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.5.bb10:
|
|
; CHECK-NEXT: successors: %bb.9(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 8, 0
|
|
; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.9
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.6.bb11:
|
|
; CHECK-NEXT: successors: %bb.9(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 12, 0
|
|
; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.9
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.7.bb12:
|
|
; CHECK-NEXT: successors: %bb.9(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 16, 0
|
|
; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.9
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.8.bb13:
|
|
; CHECK-NEXT: successors: %bb.9(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 20, 0
|
|
; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.9..backedge.backedge:
|
|
; CHECK-NEXT: successors: %bb.1(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[ADDXri1:%[0-9]+]]:gpr64sp = ADDXri [[PHI]], 1, 0
|
|
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64all = COPY [[ADDXri1]]
|
|
; CHECK-NEXT: B %bb.1
|
|
bb.0 (%ir-block.bb):
|
|
successors: %bb.1(0x80000000)
|
|
liveins: $x0, $x1
|
|
|
|
%9:gpr64common = COPY $x1
|
|
%8:gpr64common = COPY $x0
|
|
%10:gpr64sp = nuw ADDXri %9, 4, 0
|
|
%0:gpr64all = COPY %10
|
|
%11:gpr64sp = nuw ADDXri %9, 8, 0
|
|
%1:gpr64all = COPY %11
|
|
%12:gpr64sp = nuw ADDXri %9, 12, 0
|
|
%2:gpr64all = COPY %12
|
|
%13:gpr64sp = nuw ADDXri %9, 16, 0
|
|
%3:gpr64all = COPY %13
|
|
%14:gpr64sp = nuw ADDXri %9, 20, 0
|
|
%4:gpr64all = COPY %14
|
|
%15:gpr64sp = ADDXri %8, 1, 0
|
|
%5:gpr64all = COPY %15
|
|
%20:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
|
|
|
|
bb.1..backedge:
|
|
successors: %bb.8(0x09249249), %bb.9(0x76db6db7)
|
|
|
|
%6:gpr64sp = PHI %5, %bb.0, %7, %bb.8
|
|
%17:gpr32 = LDRBBui %6, 0 :: (load (s8) from %ir.lsr.iv)
|
|
%16:gpr64 = SUBREG_TO_REG 0, killed %17, %subreg.sub_32
|
|
%18:gpr32sp = COPY %16.sub_32
|
|
%19:gpr32 = SUBSWri killed %18, 50, 0, implicit-def $nzcv
|
|
Bcc 8, %bb.8, implicit $nzcv
|
|
|
|
bb.9..backedge:
|
|
successors: %bb.2(0x13b13b14), %bb.8(0x09d89d8a), %bb.3(0x13b13b14), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14)
|
|
|
|
early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 %20, %16, %jump-table.0
|
|
BR killed %21
|
|
|
|
bb.2 (%ir-block.bb7):
|
|
successors: %bb.8(0x80000000)
|
|
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$x0 = COPY %9
|
|
BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.8
|
|
|
|
bb.3 (%ir-block.bb9):
|
|
successors: %bb.8(0x80000000)
|
|
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$x0 = COPY %0
|
|
BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.8
|
|
|
|
bb.4 (%ir-block.bb10):
|
|
successors: %bb.8(0x80000000)
|
|
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$x0 = COPY %1
|
|
BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.8
|
|
|
|
bb.5 (%ir-block.bb11):
|
|
successors: %bb.8(0x80000000)
|
|
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$x0 = COPY %2
|
|
BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.8
|
|
|
|
bb.6 (%ir-block.bb12):
|
|
successors: %bb.8(0x80000000)
|
|
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$x0 = COPY %3
|
|
BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.8
|
|
|
|
bb.7 (%ir-block.bb13):
|
|
successors: %bb.8(0x80000000)
|
|
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$x0 = COPY %4
|
|
BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
|
|
bb.8..backedge.backedge:
|
|
successors: %bb.1(0x80000000)
|
|
|
|
%23:gpr64sp = ADDXri %6, 1, 0
|
|
%7:gpr64all = COPY %23
|
|
B %bb.1
|
|
|
|
...
|
|
---
|
|
name: load_not_safe_to_move_consecutive_call
|
|
alignment: 4
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32sp, preferred-register: '' }
|
|
- { id: 3, class: gpr32, preferred-register: '' }
|
|
- { id: 4, class: gpr32all, preferred-register: '' }
|
|
- { id: 5, class: gpr32all, preferred-register: '' }
|
|
- { id: 6, class: gpr32common, preferred-register: '' }
|
|
- { id: 7, class: gpr32, preferred-register: '' }
|
|
- { id: 8, class: gpr64common, preferred-register: '' }
|
|
- { id: 9, class: gpr32, preferred-register: '' }
|
|
- { id: 10, class: gpr32all, preferred-register: '' }
|
|
- { id: 11, class: gpr32, preferred-register: '' }
|
|
- { id: 12, class: gpr32, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$w0', virtual-reg: '%6' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: true
|
|
hasCalls: true
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK-NEXT: liveins: $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $w0 = COPY [[COPY]]
|
|
; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
|
|
; CHECK-NEXT: $w0 = COPY [[PHI]]
|
|
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
|
|
; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.3
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $w0
|
|
|
|
%6:gpr32common = COPY $w0
|
|
%7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%8:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
%9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$w0 = COPY %6
|
|
BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%1:gpr32all = PHI %6, %bb.0, %4, %bb.3
|
|
$w0 = COPY %1
|
|
RET_ReallyLR implicit $w0
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
|
|
%3:gpr32 = PHI %6, %bb.1, %4, %bb.3
|
|
%11:gpr32 = SDIVWr %3, %9
|
|
%4:gpr32all = COPY %11
|
|
%12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
|
|
%5:gpr32all = COPY %12
|
|
Bcc 0, %bb.2, implicit $nzcv
|
|
B %bb.3
|
|
|
|
...
|
|
---
|
|
name: load_not_safe_to_move_consecutive_call_use
|
|
alignment: 4
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32sp, preferred-register: '' }
|
|
- { id: 3, class: gpr32, preferred-register: '' }
|
|
- { id: 4, class: gpr32all, preferred-register: '' }
|
|
- { id: 5, class: gpr32all, preferred-register: '' }
|
|
- { id: 6, class: gpr32common, preferred-register: '' }
|
|
- { id: 7, class: gpr32, preferred-register: '' }
|
|
- { id: 8, class: gpr64common, preferred-register: '' }
|
|
- { id: 9, class: gpr32, preferred-register: '' }
|
|
- { id: 10, class: gpr32all, preferred-register: '' }
|
|
- { id: 11, class: gpr32, preferred-register: '' }
|
|
- { id: 12, class: gpr32, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$w0', virtual-reg: '%6' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: true
|
|
hasCalls: true
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call_use
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK-NEXT: liveins: $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $w0 = COPY [[LDRWui]]
|
|
; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
|
|
; CHECK-NEXT: $w0 = COPY [[PHI]]
|
|
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
|
|
; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.3
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $w0
|
|
|
|
%6:gpr32common = COPY $w0
|
|
%7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%8:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
%9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$w0 = COPY %9
|
|
BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%1:gpr32all = PHI %6, %bb.0, %4, %bb.3
|
|
$w0 = COPY %1
|
|
RET_ReallyLR implicit $w0
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
|
|
%3:gpr32 = PHI %6, %bb.1, %4, %bb.3
|
|
%11:gpr32 = SDIVWr %3, %9
|
|
%4:gpr32all = COPY %11
|
|
%12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
|
|
%5:gpr32all = COPY %12
|
|
Bcc 0, %bb.2, implicit $nzcv
|
|
B %bb.3
|
|
|
|
...
|
|
---
|
|
name: cant_sink_use_outside_loop
|
|
alignment: 4
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32all, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32all, preferred-register: '' }
|
|
- { id: 3, class: gpr32sp, preferred-register: '' }
|
|
- { id: 4, class: gpr32all, preferred-register: '' }
|
|
- { id: 5, class: gpr32all, preferred-register: '' }
|
|
- { id: 6, class: gpr32all, preferred-register: '' }
|
|
- { id: 7, class: gpr32common, preferred-register: '' }
|
|
- { id: 8, class: gpr32all, preferred-register: '' }
|
|
- { id: 9, class: gpr32all, preferred-register: '' }
|
|
- { id: 10, class: gpr32, preferred-register: '' }
|
|
- { id: 11, class: gpr64common, preferred-register: '' }
|
|
- { id: 12, class: gpr32, preferred-register: '' }
|
|
- { id: 13, class: gpr32, preferred-register: '' }
|
|
- { id: 14, class: gpr32, preferred-register: '' }
|
|
- { id: 15, class: gpr32all, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$w0', virtual-reg: '%7' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: true
|
|
hasCalls: true
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: cant_sink_use_outside_loop
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.4(0x30000000)
|
|
; CHECK-NEXT: liveins: $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 10, %bb.1, implicit $nzcv
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.4:
|
|
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY $wzr
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
|
|
; CHECK-NEXT: B %bb.2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[LDRWui]]
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.4, %5, %bb.5
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32all = PHI [[COPY2]], %bb.4, [[COPY3]], %bb.5
|
|
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $w0 = COPY [[PHI1]]
|
|
; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
|
|
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
; CHECK-NEXT: $w0 = COPY [[PHI]]
|
|
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.5(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %6, %bb.3
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: Bcc 1, %bb.3, implicit $nzcv
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.5:
|
|
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
|
|
; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]]
|
|
; CHECK-NEXT: B %bb.2
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $w0
|
|
|
|
%7:gpr32common = COPY $w0
|
|
%9:gpr32all = COPY $wzr
|
|
%8:gpr32all = COPY %9
|
|
%10:gpr32 = SUBSWri %7, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%11:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
%12:gpr32 = LDRWui killed %11, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
%0:gpr32all = COPY %12
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%1:gpr32all = PHI %7, %bb.0, %5, %bb.3
|
|
%2:gpr32all = PHI %8, %bb.0, %0, %bb.3
|
|
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
|
$w0 = COPY %2
|
|
BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
|
|
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
|
$w0 = COPY %1
|
|
RET_ReallyLR implicit $w0
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%3:gpr32sp = PHI %7, %bb.1, %6, %bb.3
|
|
%13:gpr32 = MOVi32imm 1
|
|
%5:gpr32all = COPY %13
|
|
%14:gpr32 = SUBSWri %3, 1, 0, implicit-def $nzcv
|
|
%6:gpr32all = COPY %14
|
|
Bcc 0, %bb.2, implicit $nzcv
|
|
B %bb.3
|
|
|
|
...
|
|
---
|
|
name: use_is_not_a_copy
|
|
alignment: 4
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32sp, preferred-register: '' }
|
|
- { id: 3, class: gpr32, preferred-register: '' }
|
|
- { id: 4, class: gpr32all, preferred-register: '' }
|
|
- { id: 5, class: gpr32all, preferred-register: '' }
|
|
- { id: 6, class: gpr32common, preferred-register: '' }
|
|
- { id: 7, class: gpr32, preferred-register: '' }
|
|
- { id: 8, class: gpr64common, preferred-register: '' }
|
|
- { id: 9, class: gpr32, preferred-register: '' }
|
|
- { id: 10, class: gpr32, preferred-register: '' }
|
|
- { id: 11, class: gpr32, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$w0', virtual-reg: '%6' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: use_is_not_a_copy
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK-NEXT: liveins: $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
|
|
; CHECK-NEXT: $w0 = COPY [[PHI]]
|
|
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
|
|
; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.3
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $w0
|
|
|
|
%6:gpr32common = COPY $w0
|
|
%7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%8:gpr64common = ADRP target-flags(aarch64-page) @A
|
|
%9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%1:gpr32all = PHI %6, %bb.0, %4, %bb.3
|
|
$w0 = COPY %1
|
|
RET_ReallyLR implicit $w0
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
|
|
%3:gpr32 = PHI %6, %bb.1, %4, %bb.3
|
|
%10:gpr32 = SDIVWr %3, %9
|
|
%4:gpr32all = COPY %10
|
|
%11:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
|
|
%5:gpr32all = COPY %11
|
|
Bcc 0, %bb.2, implicit $nzcv
|
|
B %bb.3
|
|
|
|
...
|
|
---
|
|
name: sink_add
|
|
alignment: 16
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32sp, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32, preferred-register: '' }
|
|
- { id: 3, class: gpr32common, preferred-register: '' }
|
|
- { id: 4, class: gpr32sp, preferred-register: '' }
|
|
- { id: 5, class: gpr32, preferred-register: '' }
|
|
- { id: 6, class: gpr32all, preferred-register: '' }
|
|
- { id: 7, class: gpr32all, preferred-register: '' }
|
|
- { id: 8, class: gpr32all, preferred-register: '' }
|
|
- { id: 9, class: gpr64common, preferred-register: '' }
|
|
- { id: 10, class: gpr64common, preferred-register: '' }
|
|
- { id: 11, class: gpr32common, preferred-register: '' }
|
|
- { id: 12, class: gpr32common, preferred-register: '' }
|
|
- { id: 13, class: gpr32, preferred-register: '' }
|
|
- { id: 14, class: gpr32sp, preferred-register: '' }
|
|
- { id: 15, class: gpr32, preferred-register: '' }
|
|
- { id: 16, class: gpr32, preferred-register: '' }
|
|
- { id: 17, class: gpr32sp, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$x0', virtual-reg: '%9' }
|
|
- { reg: '$x1', virtual-reg: '%10' }
|
|
- { reg: '$w2', virtual-reg: '%11' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: sink_add
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK-NEXT: liveins: $x0, $x1, $w2
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w2
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x1
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY2]], 0 :: (load (s32) from %ir.read, !tbaa !0)
|
|
; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0
|
|
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[ADDWri]]
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3
|
|
; CHECK-NEXT: STRWui [[PHI]], [[COPY1]], 0 :: (store (s32) into %ir.write, !tbaa !0)
|
|
; CHECK-NEXT: RET_ReallyLR
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY3]], %bb.1, %8, %bb.3
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3
|
|
; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3
|
|
; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]
|
|
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0
|
|
; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]
|
|
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.3
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $x0, $x1, $w2
|
|
|
|
%11:gpr32common = COPY $w2
|
|
%10:gpr64common = COPY $x1
|
|
%9:gpr64common = COPY $x0
|
|
%12:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)
|
|
%13:gpr32 = SUBSWri %11, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%14:gpr32sp = ADDWri %12, 42, 0
|
|
%1:gpr32all = COPY %14
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%2:gpr32 = PHI %11, %bb.0, %6, %bb.3
|
|
STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)
|
|
RET_ReallyLR
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%3:gpr32common = PHI %1, %bb.1, %8, %bb.3
|
|
%4:gpr32sp = PHI %11, %bb.1, %7, %bb.3
|
|
%5:gpr32 = PHI %11, %bb.1, %6, %bb.3
|
|
%15:gpr32 = SDIVWr %5, %3
|
|
%6:gpr32all = COPY %15
|
|
%16:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv
|
|
%7:gpr32all = COPY %16
|
|
%17:gpr32sp = ADDWri %3, 1, 0
|
|
%8:gpr32all = COPY %17
|
|
Bcc 0, %bb.2, implicit $nzcv
|
|
B %bb.3
|
|
|
|
...
|
|
---
|
|
name: store_after_add
|
|
alignment: 16
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32sp, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32, preferred-register: '' }
|
|
- { id: 3, class: gpr32common, preferred-register: '' }
|
|
- { id: 4, class: gpr32sp, preferred-register: '' }
|
|
- { id: 5, class: gpr32, preferred-register: '' }
|
|
- { id: 6, class: gpr32all, preferred-register: '' }
|
|
- { id: 7, class: gpr32all, preferred-register: '' }
|
|
- { id: 8, class: gpr32all, preferred-register: '' }
|
|
- { id: 9, class: gpr64common, preferred-register: '' }
|
|
- { id: 10, class: gpr64common, preferred-register: '' }
|
|
- { id: 11, class: gpr64common, preferred-register: '' }
|
|
- { id: 12, class: gpr32common, preferred-register: '' }
|
|
- { id: 13, class: gpr32common, preferred-register: '' }
|
|
- { id: 14, class: gpr32, preferred-register: '' }
|
|
- { id: 15, class: gpr32, preferred-register: '' }
|
|
- { id: 16, class: gpr32sp, preferred-register: '' }
|
|
- { id: 17, class: gpr32, preferred-register: '' }
|
|
- { id: 18, class: gpr32, preferred-register: '' }
|
|
- { id: 19, class: gpr32sp, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$x0', virtual-reg: '%9' }
|
|
- { reg: '$x1', virtual-reg: '%10' }
|
|
- { reg: '$x2', virtual-reg: '%11' }
|
|
- { reg: '$w3', virtual-reg: '%12' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: store_after_add
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK-NEXT: liveins: $x0, $x1, $x2, $w3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x2
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x1
|
|
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0)
|
|
; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0
|
|
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]
|
|
; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 43
|
|
; CHECK-NEXT: STRWui killed [[MOVi32imm]], [[COPY1]], 0 :: (store (s32) into %ir.store, !tbaa !0)
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3
|
|
; CHECK-NEXT: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0)
|
|
; CHECK-NEXT: RET_ReallyLR
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.3
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3
|
|
; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3
|
|
; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]
|
|
; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0
|
|
; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]
|
|
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.3
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $x0, $x1, $x2, $w3
|
|
|
|
%12:gpr32common = COPY $w3
|
|
%11:gpr64common = COPY $x2
|
|
%10:gpr64common = COPY $x1
|
|
%9:gpr64common = COPY $x0
|
|
%13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)
|
|
%15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%16:gpr32sp = ADDWri %13, 42, 0
|
|
%1:gpr32all = COPY %16
|
|
%14:gpr32 = MOVi32imm 43
|
|
STRWui killed %14, %11, 0 :: (store (s32) into %ir.store, !tbaa !0)
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%2:gpr32 = PHI %12, %bb.0, %6, %bb.3
|
|
STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)
|
|
RET_ReallyLR
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%3:gpr32common = PHI %1, %bb.1, %8, %bb.3
|
|
%4:gpr32sp = PHI %12, %bb.1, %7, %bb.3
|
|
%5:gpr32 = PHI %12, %bb.1, %6, %bb.3
|
|
%17:gpr32 = SDIVWr %5, %3
|
|
%6:gpr32all = COPY %17
|
|
%18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv
|
|
%7:gpr32all = COPY %18
|
|
%19:gpr32sp = ADDWri %3, 1, 0
|
|
%8:gpr32all = COPY %19
|
|
Bcc 0, %bb.2, implicit $nzcv
|
|
B %bb.3
|
|
|
|
...
|
|
---
|
|
name: aliased_store_after_add
|
|
alignment: 16
|
|
exposesReturnsTwice: false
|
|
legalized: false
|
|
regBankSelected: false
|
|
selected: false
|
|
failedISel: false
|
|
tracksRegLiveness: true
|
|
hasWinCFI: false
|
|
registers:
|
|
- { id: 0, class: gpr32sp, preferred-register: '' }
|
|
- { id: 1, class: gpr32all, preferred-register: '' }
|
|
- { id: 2, class: gpr32, preferred-register: '' }
|
|
- { id: 3, class: gpr32common, preferred-register: '' }
|
|
- { id: 4, class: gpr32sp, preferred-register: '' }
|
|
- { id: 5, class: gpr32, preferred-register: '' }
|
|
- { id: 6, class: gpr32all, preferred-register: '' }
|
|
- { id: 7, class: gpr32all, preferred-register: '' }
|
|
- { id: 8, class: gpr32all, preferred-register: '' }
|
|
- { id: 9, class: gpr64common, preferred-register: '' }
|
|
- { id: 10, class: gpr64common, preferred-register: '' }
|
|
- { id: 11, class: gpr64common, preferred-register: '' }
|
|
- { id: 12, class: gpr32common, preferred-register: '' }
|
|
- { id: 13, class: gpr32common, preferred-register: '' }
|
|
- { id: 14, class: gpr32, preferred-register: '' }
|
|
- { id: 15, class: gpr32, preferred-register: '' }
|
|
- { id: 16, class: gpr32sp, preferred-register: '' }
|
|
- { id: 17, class: gpr32, preferred-register: '' }
|
|
- { id: 18, class: gpr32, preferred-register: '' }
|
|
- { id: 19, class: gpr32sp, preferred-register: '' }
|
|
liveins:
|
|
- { reg: '$x0', virtual-reg: '%9' }
|
|
- { reg: '$x1', virtual-reg: '%10' }
|
|
- { reg: '$x2', virtual-reg: '%11' }
|
|
- { reg: '$w3', virtual-reg: '%12' }
|
|
frameInfo:
|
|
isFrameAddressTaken: false
|
|
isReturnAddressTaken: false
|
|
hasStackMap: false
|
|
hasPatchPoint: false
|
|
stackSize: 0
|
|
offsetAdjustment: 0
|
|
maxAlignment: 1
|
|
adjustsStack: false
|
|
hasCalls: false
|
|
stackProtector: ''
|
|
maxCallFrameSize: 0
|
|
cvBytesOfCalleeSavedRegisters: 0
|
|
hasOpaqueSPAdjustment: false
|
|
hasVAStart: false
|
|
hasMustTailInVarArgFunc: false
|
|
localFrameSize: 0
|
|
savePoint: ''
|
|
restorePoint: ''
|
|
fixedStack: []
|
|
stack: []
|
|
callSites: []
|
|
debugValueSubstitutions: []
|
|
constants: []
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: aliased_store_after_add
|
|
; CHECK: bb.0.entry:
|
|
; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK-NEXT: liveins: $x0, $x1, $x2, $w3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w3
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x2
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x1
|
|
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x0
|
|
; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1.for.body.preheader:
|
|
; CHECK-NEXT: successors: %bb.3(0x80000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0)
|
|
; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0
|
|
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]
|
|
; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 43
|
|
; CHECK-NEXT: STRWui killed [[MOVi32imm]], [[COPY3]], 0 :: (store (s32) into %ir.read, !tbaa !0)
|
|
; CHECK-NEXT: B %bb.3
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2.for.cond.cleanup:
|
|
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3
|
|
; CHECK-NEXT: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0)
|
|
; CHECK-NEXT: RET_ReallyLR
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.3.for.body:
|
|
; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.3
|
|
; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3
|
|
; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3
|
|
; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]
|
|
; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
|
|
; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
|
|
; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
|
|
; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0
|
|
; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]
|
|
; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
|
|
; CHECK-NEXT: B %bb.3
|
|
bb.0.entry:
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $x0, $x1, $x2, $w3
|
|
|
|
%12:gpr32common = COPY $w3
|
|
%11:gpr64common = COPY $x2
|
|
%10:gpr64common = COPY $x1
|
|
%9:gpr64common = COPY $x0
|
|
%13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)
|
|
%15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv
|
|
Bcc 11, %bb.2, implicit $nzcv
|
|
B %bb.1
|
|
|
|
bb.1.for.body.preheader:
|
|
successors: %bb.3(0x80000000)
|
|
|
|
%16:gpr32sp = ADDWri %13, 42, 0
|
|
%1:gpr32all = COPY %16
|
|
%14:gpr32 = MOVi32imm 43
|
|
STRWui killed %14, %9, 0 :: (store (s32) into %ir.read, !tbaa !0)
|
|
B %bb.3
|
|
|
|
bb.2.for.cond.cleanup:
|
|
%2:gpr32 = PHI %12, %bb.0, %6, %bb.3
|
|
STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)
|
|
RET_ReallyLR
|
|
|
|
bb.3.for.body:
|
|
successors: %bb.2(0x04000000), %bb.3(0x7c000000)
|
|
|
|
%3:gpr32common = PHI %1, %bb.1, %8, %bb.3
|
|
%4:gpr32sp = PHI %12, %bb.1, %7, %bb.3
|
|
%5:gpr32 = PHI %12, %bb.1, %6, %bb.3
|
|
%17:gpr32 = SDIVWr %5, %3
|
|
%6:gpr32all = COPY %17
|
|
%18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv
|
|
%7:gpr32all = COPY %18
|
|
%19:gpr32sp = ADDWri %3, 1, 0
|
|
%8:gpr32all = COPY %19
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Bcc 0, %bb.2, implicit $nzcv
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B %bb.3
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...
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