34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64--linux-gnueabihf | FileCheck %s
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;; This used to cause a backend crash about not being able to
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;; select ROTL. Make sure if generates the basic ushr/shl.
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define <2 x i64> @testcase(ptr %in) {
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; CHECK-LABEL: testcase:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q1, [x0]
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; CHECK-NEXT: shl v0.2d, v1.2d, #56
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; CHECK-NEXT: usra v0.2d, v1.2d, #8
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; CHECK-NEXT: ret
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%1 = load <2 x i64>, ptr %in
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%2 = lshr <2 x i64> %1, <i64 8, i64 8>
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%3 = shl <2 x i64> %1, <i64 56, i64 56>
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%4 = or <2 x i64> %2, %3
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ret <2 x i64> %4
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}
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;; This used to cause a miscompile because rot combine
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;; doesn't handle negative shift well.
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define i5 @pr59898(i5 %x) {
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; CHECK-LABEL: pr59898:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ubfx w8, w0, #1, #4
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; CHECK-NEXT: orr w0, w8, w0, lsl #4
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; CHECK-NEXT: ret
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%r1 = call i5 @llvm.fshr.i5(i5 %x, i5 %x, i5 3)
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%r2 = call i5 @llvm.fshl.i5(i5 %r1, i5 %r1, i5 2)
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ret i5 %r2
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}
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declare i5 @llvm.fshl.i5(i5, i5, i5)
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declare i5 @llvm.fshr.i5(i5, i5, i5)
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