151 lines
4.6 KiB
LLVM
151 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 -mattr=+sve < %s -o - | FileCheck --check-prefix=SVE %s
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; RUN: llc -mtriple=aarch64 -mattr=+sve2 < %s -o - | FileCheck --check-prefix=SVE2 %s
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define <vscale x 16 x i8> @eor3_nxv16i8_left(<vscale x 16 x i8> %0, <vscale x 16 x i8> %1, <vscale x 16 x i8> %2) {
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; SVE-LABEL: eor3_nxv16i8_left:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z0.d, z2.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv16i8_left:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 16 x i8> %0, %1
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%5 = xor <vscale x 16 x i8> %4, %2
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ret <vscale x 16 x i8> %5
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}
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define <vscale x 16 x i8> @eor3_nxv16i8_right(<vscale x 16 x i8> %0, <vscale x 16 x i8> %1, <vscale x 16 x i8> %2) {
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; SVE-LABEL: eor3_nxv16i8_right:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z2.d, z0.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv16i8_right:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
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; SVE2-NEXT: mov z0.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 16 x i8> %0, %1
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%5 = xor <vscale x 16 x i8> %2, %4
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ret <vscale x 16 x i8> %5
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}
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define <vscale x 8 x i16> @eor3_nxv8i16_left(<vscale x 8 x i16> %0, <vscale x 8 x i16> %1, <vscale x 8 x i16> %2) {
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; SVE-LABEL: eor3_nxv8i16_left:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z0.d, z2.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv8i16_left:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 8 x i16> %0, %1
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%5 = xor <vscale x 8 x i16> %4, %2
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ret <vscale x 8 x i16> %5
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}
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define <vscale x 8 x i16> @eor3_nxv8i16_right(<vscale x 8 x i16> %0, <vscale x 8 x i16> %1, <vscale x 8 x i16> %2) {
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; SVE-LABEL: eor3_nxv8i16_right:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z2.d, z0.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv8i16_right:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
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; SVE2-NEXT: mov z0.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 8 x i16> %0, %1
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%5 = xor <vscale x 8 x i16> %2, %4
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ret <vscale x 8 x i16> %5
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}
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define <vscale x 4 x i32> @eor3_nxv4i32_left(<vscale x 4 x i32> %0, <vscale x 4 x i32> %1, <vscale x 4 x i32> %2) {
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; SVE-LABEL: eor3_nxv4i32_left:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z0.d, z2.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv4i32_left:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 4 x i32> %0, %1
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%5 = xor <vscale x 4 x i32> %4, %2
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ret <vscale x 4 x i32> %5
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}
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define <vscale x 4 x i32> @eor3_nxv4i32_right(<vscale x 4 x i32> %0, <vscale x 4 x i32> %1, <vscale x 4 x i32> %2) {
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; SVE-LABEL: eor3_nxv4i32_right:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z2.d, z0.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv4i32_right:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
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; SVE2-NEXT: mov z0.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 4 x i32> %0, %1
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%5 = xor <vscale x 4 x i32> %2, %4
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ret <vscale x 4 x i32> %5
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}
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define <vscale x 2 x i64> @eor3_nxv2i64_left(<vscale x 2 x i64> %0, <vscale x 2 x i64> %1, <vscale x 2 x i64> %2) {
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; SVE-LABEL: eor3_nxv2i64_left:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z0.d, z2.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv2i64_left:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z0.d, z0.d, z1.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 2 x i64> %0, %1
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%5 = xor <vscale x 2 x i64> %4, %2
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ret <vscale x 2 x i64> %5
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}
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define <vscale x 2 x i64> @eor3_nxv2i64_right(<vscale x 2 x i64> %0, <vscale x 2 x i64> %1, <vscale x 2 x i64> %2) {
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; SVE-LABEL: eor3_nxv2i64_right:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: eor z0.d, z2.d, z0.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_nxv2i64_right:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor3 z2.d, z2.d, z0.d, z1.d
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; SVE2-NEXT: mov z0.d, z2.d
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; SVE2-NEXT: ret
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%4 = xor <vscale x 2 x i64> %0, %1
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%5 = xor <vscale x 2 x i64> %2, %4
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ret <vscale x 2 x i64> %5
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}
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define <vscale x 2 x i64> @eor3_vnot(<vscale x 2 x i64> %0, <vscale x 2 x i64> %1) {
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; SVE-LABEL: eor3_vnot:
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; SVE: // %bb.0:
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; SVE-NEXT: eor z0.d, z0.d, z1.d
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; SVE-NEXT: ret
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;
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; SVE2-LABEL: eor3_vnot:
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; SVE2: // %bb.0:
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; SVE2-NEXT: eor z0.d, z0.d, z1.d
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; SVE2-NEXT: ret
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%3 = xor <vscale x 2 x i64> %0, zeroinitializer
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%4 = xor <vscale x 2 x i64> %3, %1
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ret <vscale x 2 x i64> %4
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}
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