62 lines
3.2 KiB
LLVM
62 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 -mattr=+b16b16 -mattr=+use-experimental-zeroing-pseudos -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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define <vscale x 8 x bfloat> @bfmul_pred(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b){
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; CHECK-LABEL: bfmul_pred:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bfmul z0.h, p0/m, z0.h, z1.h
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.nxv8bf16(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b)
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ret <vscale x 8 x bfloat> %res
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}
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define <vscale x 8 x bfloat> @bfmul_zeroing(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {
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; CHECK-LABEL: bfmul_zeroing:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movprfx z0.h, p0/z, z0.h
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; CHECK-NEXT: bfmul z0.h, p0/m, z0.h, z1.h
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; CHECK-NEXT: ret
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%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> zeroinitializer
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%out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.nxv8bf16(<vscale x 8 x i1> %pg,
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<vscale x 8 x bfloat> %a_z,
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<vscale x 8 x bfloat> %b)
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ret <vscale x 8 x bfloat> %out
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}
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define <vscale x 8 x bfloat> @bfmul_u_pred(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b){
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; CHECK-LABEL: bfmul_u_pred:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bfmul z0.h, p0/m, z0.h, z1.h
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.u.nxv8bf16(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b)
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ret <vscale x 8 x bfloat> %res
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}
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define <vscale x 8 x bfloat> @bfmul_u(<vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b){
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; CHECK-LABEL: bfmul_u:
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; CHECK: // %bb.0:
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; CHECK-NEXT: bfmul z0.h, z0.h, z1.h
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; CHECK-NEXT: ret
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%elt = call <vscale x 8 x i1> @llvm.aarch64.sve.ptrue.nxv8i1(i32 31)
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%res = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.u.nxv8bf16(<vscale x 8 x i1> %elt, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b)
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ret <vscale x 8 x bfloat> %res
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}
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define <vscale x 8 x bfloat> @bfmul_u_zeroing(<vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {
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; CHECK-LABEL: bfmul_u_zeroing:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z2.h, #0 // =0x0
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; CHECK-NEXT: sel z0.h, p0, z0.h, z2.h
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; CHECK-NEXT: bfmul z0.h, p0/m, z0.h, z1.h
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; CHECK-NEXT: ret
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%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> zeroinitializer
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%out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.u.nxv8bf16(<vscale x 8 x i1> %pg,
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<vscale x 8 x bfloat> %a_z,
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<vscale x 8 x bfloat> %b)
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ret <vscale x 8 x bfloat> %out
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}
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declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.nxv8bf16(<vscale x 8 x i1>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>)
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declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fmul.u.nxv8bf16(<vscale x 8 x i1>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>)
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declare <vscale x 8 x i1> @llvm.aarch64.sve.ptrue.nxv8i1(i32 immarg)
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