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bolt/deps/llvm-18.1.8/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop1.mir
Sam Vervaeck 174b6f4d4e
Embed LLVM 18.1.8
2025-02-14 19:21:04 +01:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
---
name: sitofp_i32_to_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: sitofp_i32_to_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: [[S_CVT_F32_I32_:%[0-9]+]]:sreg_32 = S_CVT_F32_I32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_F32_I32_]]
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_SITOFP %0(s32)
$sgpr0 = COPY %1(s32)
...
---
name: uitofp_u32_to_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: uitofp_u32_to_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: [[S_CVT_F32_U32_:%[0-9]+]]:sreg_32 = S_CVT_F32_U32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_F32_U32_]]
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_UITOFP %0(s32)
$sgpr0 = COPY %1(s32)
...
---
name: fptosi_f32_to_i32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fptosi_f32_to_i32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_I32_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_FPTOSI %0(s32)
$sgpr0 = COPY %1(s32)
...
---
name: fptoui_f32_to_u32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fptoui_f32_to_u32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_U32_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_FPTOUI %0(s32)
$sgpr0 = COPY %1(s32)
...
---
name: fpext_f16_to_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fpext_f16_to_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CVT_F32_F16 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0(s32)
%2:sgpr(s32) = G_FPEXT %1(s16)
$sgpr0 = COPY %2(s32)
...
---
name: fpext_hif16_to_32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fpext_hif16_to_32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: [[S_CVT_HI_F32_F16_:%[0-9]+]]:sreg_32 = S_CVT_HI_F32_F16 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_HI_F32_F16_]]
%0:sgpr(<2 x s16>) = COPY $sgpr0
%2:sgpr(s32) = G_BITCAST %0(<2 x s16>)
%3:sgpr(s32) = G_CONSTANT i32 16
%4:sgpr(s32) = G_LSHR %2, %3(s32)
%5:sgpr(s16) = G_TRUNC %4(s32)
%6:sgpr(s32) = G_FPEXT %5(s16)
$sgpr0 = COPY %6(s32)
...
---
name: fptrunc_f32_to_f16
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fptrunc_f32_to_f16
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_F16_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_FPTRUNC %0(s32)
%2:sgpr(s32) = G_ANYEXT %1(s16)
$sgpr0 = COPY %2(s32)
...
---
name: fceil_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fceil_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CEIL_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_FCEIL %0
$sgpr0 = COPY %1(s32)
...
---
name: ffloor_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: ffloor_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_FLOOR_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_FFLOOR %0
$sgpr0 = COPY %1(s32)
...
---
name: ftrunc_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: ftrunc_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_TRUNC_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_INTRINSIC_TRUNC %0
$sgpr0 = COPY %1(s32)
...
---
name: frint_f32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: frint_f32
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_RNDNE_F32 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %1
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = G_INTRINSIC_ROUNDEVEN %0
$sgpr0 = COPY %1(s32)
...
---
name: fceil_f16
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: fceil_f16
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CEIL_F16 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0(s32)
%2:sgpr(s16) = G_FCEIL %1
%3:sgpr(s32) = G_ANYEXT %2(s16)
$sgpr0 = COPY %3(s32)
...
---
name: ffloor_f16
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: ffloor_f16
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_FLOOR_F16 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0(s32)
%2:sgpr(s16) = G_FFLOOR %1
%3:sgpr(s32) = G_ANYEXT %2(s16)
$sgpr0 = COPY %3(s32)
...
---
name: ftrunc_f16
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: ftrunc_f16
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_TRUNC_F16 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0(s32)
%2:sgpr(s16) = G_INTRINSIC_TRUNC %1
%3:sgpr(s32) = G_ANYEXT %2(s16)
$sgpr0 = COPY %3(s32)
...
---
name: frint_f16
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; GFX1150-LABEL: name: frint_f16
; GFX1150: liveins: $sgpr0
; GFX1150-NEXT: {{ $}}
; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_RNDNE_F16 [[COPY]], implicit $mode
; GFX1150-NEXT: $sgpr0 = COPY %2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0(s32)
%2:sgpr(s16) = G_INTRINSIC_ROUNDEVEN %1
%3:sgpr(s32) = G_ANYEXT %2(s16)
$sgpr0 = COPY %3(s32)
...
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