33 lines
1.3 KiB
YAML
33 lines
1.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect -regbankselect-greedy -o - %s | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=amdgpu-regbankselect -regbankselect-fast -o - %s | FileCheck %s
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# TODO: We could use scalar
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---
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name: amdgpu_wave_address
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legalized: true
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body: |
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bb.0:
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; CHECK-LABEL: name: amdgpu_wave_address
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; CHECK: [[AMDGPU_WAVE_ADDRESS:%[0-9]+]]:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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; CHECK-NEXT: S_ENDPGM 0, implicit [[AMDGPU_WAVE_ADDRESS]](p5)
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%0:_(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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S_ENDPGM 0, implicit %0
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...
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# TODO: Should infer v here
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---
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name: amdgpu_wave_address_v
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legalized: true
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body: |
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bb.0:
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; CHECK-LABEL: name: amdgpu_wave_address_v
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; CHECK: [[DEF:%[0-9]+]]:sgpr(p1) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[AMDGPU_WAVE_ADDRESS:%[0-9]+]]:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p5) = COPY [[AMDGPU_WAVE_ADDRESS]](p5)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[DEF]](p1)
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; CHECK-NEXT: G_STORE [[COPY]](p5), [[COPY1]](p1) :: (store (p5), addrspace 1)
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%0:_(p1) = G_IMPLICIT_DEF
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%1:_(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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G_STORE %1, %0 :: (store (p5), addrspace 1)
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...
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