64 lines
2.6 KiB
LLVM
64 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GFX11
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GFX11
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declare float @llvm.amdgcn.fdot2.f32.bf16(<2 x i16> %a, <2 x i16> %b, float %c, i1 %clamp)
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define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f32_bf16_clamp(
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; GFX11-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_clamp:
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; GFX11: ; %bb.0: ; %entry
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; GFX11-NEXT: s_load_b256 s[0:7], s[0:1], 0x24
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; GFX11-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-NEXT: s_load_b32 s6, s[6:7], 0x0
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; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0
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; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x0
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; GFX11-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-NEXT: v_dot2_f32_bf16 v0, s2, s3, v0 clamp
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; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
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; GFX11-NEXT: s_nop 0
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; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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; GFX11-NEXT: s_endpgm
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ptr addrspace(1) %r,
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ptr addrspace(1) %a,
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ptr addrspace(1) %b,
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ptr addrspace(1) %c) {
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entry:
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%a.val = load <2 x i16>, ptr addrspace(1) %a
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%b.val = load <2 x i16>, ptr addrspace(1) %b
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%c.val = load float, ptr addrspace(1) %c
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%r.val = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x i16> %a.val, <2 x i16> %b.val, float %c.val, i1 1)
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store float %r.val, ptr addrspace(1) %r
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ret void
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}
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define amdgpu_kernel void @test_llvm_amdgcn_fdot2_f32_bf16_no_clamp(
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; GFX11-LABEL: test_llvm_amdgcn_fdot2_f32_bf16_no_clamp:
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; GFX11: ; %bb.0: ; %entry
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; GFX11-NEXT: s_load_b256 s[0:7], s[0:1], 0x24
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; GFX11-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-NEXT: s_load_b32 s6, s[6:7], 0x0
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; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0
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; GFX11-NEXT: s_load_b32 s3, s[4:5], 0x0
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; GFX11-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s6
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-NEXT: v_dot2_f32_bf16 v0, s2, s3, v0
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; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]
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; GFX11-NEXT: s_nop 0
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; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
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; GFX11-NEXT: s_endpgm
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ptr addrspace(1) %r,
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ptr addrspace(1) %a,
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ptr addrspace(1) %b,
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ptr addrspace(1) %c) {
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entry:
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%a.val = load <2 x i16>, ptr addrspace(1) %a
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%b.val = load <2 x i16>, ptr addrspace(1) %b
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%c.val = load float, ptr addrspace(1) %c
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%r.val = call float @llvm.amdgcn.fdot2.f32.bf16(<2 x i16> %a.val, <2 x i16> %b.val, float %c.val, i1 0)
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store float %r.val, ptr addrspace(1) %r
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ret void
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}
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