95 lines
2.9 KiB
LLVM
95 lines
2.9 KiB
LLVM
; RUN: llc -mtriple=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; GCN-LABEL: {{^}}mbcnt_intrinsics:
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; GCN: v_mbcnt_lo_u32_b32{{(_e64)*}} [[LO:v[0-9]+]], -1, 0
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; SI: v_mbcnt_hi_u32_b32_e32 {{v[0-9]+}}, -1, [[LO]]
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; VI: v_mbcnt_hi_u32_b32 {{v[0-9]+}}, -1, [[LO]]
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define amdgpu_ps void @mbcnt_intrinsics(ptr addrspace(4) inreg %arg, ptr addrspace(4) inreg %arg1, ptr addrspace(4) inreg %arg2, i32 inreg %arg3) {
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main_body:
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%lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
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%hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo) #0
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%tmp = bitcast i32 %hi to float
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call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp, float %tmp, float %tmp, float %tmp, i1 true, i1 true) #1
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ret void
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}
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; GCN-LABEL: {{^}}mbcnt_lo_known_bits_1:
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; GCN: v_mbcnt_lo_u32_b32
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; GCN: v_and_b32_e32
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define i32 @mbcnt_lo_known_bits_1(i32 %x, i32 %y) #0 {
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%lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 %y)
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%mask = and i32 %lo, 63
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_lo_known_bits_2:
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; GCN: v_mbcnt_lo_u32_b32
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; GCN-NOT: and
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define i32 @mbcnt_lo_known_bits_2(i32 %x) #0 {
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%lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 0)
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%mask = and i32 %lo, 63
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_lo_known_bits_3:
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; GCN: v_mbcnt_lo_u32_b32
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; GCN-NOT: and
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define i32 @mbcnt_lo_known_bits_3(i32 %x) #0 {
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%lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 15)
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%mask = and i32 %lo, 127
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_lo_known_bits_4:
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; GCN: v_mbcnt_lo_u32_b32
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; GCN: v_and_b32_e32
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define i32 @mbcnt_lo_known_bits_4(i32 %x) #0 {
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%lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 15)
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%mask = and i32 %lo, 63
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_hi_known_bits_1:
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; GCN: v_mbcnt_hi_u32_b32
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; GCN: v_and_b32_e32
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define i32 @mbcnt_hi_known_bits_1(i32 %x, i32 %y) #0 {
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%hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 %y)
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%mask = and i32 %hi, 63
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_hi_known_bits_2:
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; GCN: v_mbcnt_hi_u32_b32
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; GCN-NOT: and
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define i32 @mbcnt_hi_known_bits_2(i32 %x) #0 {
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%hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 0)
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%mask = and i32 %hi, 63
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_hi_known_bits_3:
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; GCN: v_mbcnt_hi_u32_b32
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; GCN-NOT: and
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define i32 @mbcnt_hi_known_bits_3(i32 %x) #0 {
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%hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 15)
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%mask = and i32 %hi, 127
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ret i32 %mask
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}
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; GCN-LABEL: {{^}}mbcnt_hi_known_bits_4:
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; GCN: v_mbcnt_hi_u32_b32
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; GCN: v_and_b32_e32
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define i32 @mbcnt_hi_known_bits_4(i32 %x) #0 {
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%hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 15)
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%mask = and i32 %hi, 63
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ret i32 %mask
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}
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declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
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declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
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declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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