30 lines
985 B
LLVM
30 lines
985 B
LLVM
; RUN: llc -march=hexagon -mattr=-packets -hexagon-check-bank-conflict=0 < %s | FileCheck %s
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; Do not check stores. They undergo some optimizations in the DAG combiner
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; resulting in getting out of order. There is likely little that can be
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; done to keep the original order.
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target triple = "hexagon"
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%s.0 = type { i32, i32, i32 }
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; Function Attrs: nounwind
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define void @f0(ptr %a0, ptr %a1) #0 {
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b0:
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; CHECK: = memw({{.*}}+#0)
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; CHECK: = memw({{.*}}+#4)
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; CHECK: = memw({{.*}}+#8)
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%v0 = alloca ptr, align 4
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%v1 = alloca ptr, align 4
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store ptr %a0, ptr %v0, align 4
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store ptr %a1, ptr %v1, align 4
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%v2 = load ptr, ptr %v0, align 4
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%v3 = load ptr, ptr %v1, align 4
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call void @llvm.memcpy.p0.p0.i32(ptr align 4 %v2, ptr align 4 %v3, i32 12, i1 false)
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1) #1
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attributes #0 = { nounwind }
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attributes #1 = { argmemonly nounwind }
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