bolt/deps/llvm-18.1.8/llvm/test/CodeGen/Hexagon/vect/vect-mul-v2i32.ll
2025-02-14 19:21:04 +01:00

9 lines
194 B
LLVM

; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK: mpyi
; CHECK: mpyi
define <2 x i32> @t_i2x32(<2 x i32> %a, <2 x i32> %b) nounwind {
entry:
%0 = mul <2 x i32> %a, %b
ret <2 x i32> %0
}