53 lines
1.5 KiB
LLVM
53 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
|
|
|
|
|
|
|
|
|
|
declare i32 @llvm.loongarch.lasx.xvpickve2gr.w(<8 x i32>, i32)
|
|
|
|
define i32 @lasx_xvpickve2gr_w(<8 x i32> %va) nounwind {
|
|
; CHECK-LABEL: lasx_xvpickve2gr_w:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 1
|
|
; CHECK-NEXT: ret
|
|
entry:
|
|
%res = call i32 @llvm.loongarch.lasx.xvpickve2gr.w(<8 x i32> %va, i32 1)
|
|
ret i32 %res
|
|
}
|
|
|
|
declare i64 @llvm.loongarch.lasx.xvpickve2gr.d(<4 x i64>, i32)
|
|
|
|
define i64 @lasx_xvpickve2gr_d(<4 x i64> %va) nounwind {
|
|
; CHECK-LABEL: lasx_xvpickve2gr_d:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xvpickve2gr.d $a0, $xr0, 1
|
|
; CHECK-NEXT: ret
|
|
entry:
|
|
%res = call i64 @llvm.loongarch.lasx.xvpickve2gr.d(<4 x i64> %va, i32 1)
|
|
ret i64 %res
|
|
}
|
|
|
|
declare i32 @llvm.loongarch.lasx.xvpickve2gr.wu(<8 x i32>, i32)
|
|
|
|
define i32 @lasx_xvpickve2gr_wu(<8 x i32> %va) nounwind {
|
|
; CHECK-LABEL: lasx_xvpickve2gr_wu:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xvpickve2gr.wu $a0, $xr0, 1
|
|
; CHECK-NEXT: ret
|
|
entry:
|
|
%res = call i32 @llvm.loongarch.lasx.xvpickve2gr.wu(<8 x i32> %va, i32 1)
|
|
ret i32 %res
|
|
}
|
|
|
|
declare i64 @llvm.loongarch.lasx.xvpickve2gr.du(<4 x i64>, i32)
|
|
|
|
define i64 @lasx_xvpickve2gr_du(<4 x i64> %va) nounwind {
|
|
; CHECK-LABEL: lasx_xvpickve2gr_du:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xvpickve2gr.du $a0, $xr0, 1
|
|
; CHECK-NEXT: ret
|
|
entry:
|
|
%res = call i64 @llvm.loongarch.lasx.xvpickve2gr.du(<4 x i64> %va, i32 1)
|
|
ret i64 %res
|
|
}
|