85 lines
3.8 KiB
LLVM
85 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
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define void @select_v32i8_imm(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: select_v32i8_imm:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvrepli.h $xr1, -256
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; CHECK-NEXT: xvbitseli.b $xr1, $xr0, 1
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; CHECK-NEXT: xvst $xr1, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <32 x i8>, ptr %a0
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%sel = select <32 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <32 x i8> %v0
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store <32 x i8> %sel, ptr %res
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ret void
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}
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define void @select_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
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; CHECK-LABEL: select_v32i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvld $xr1, $a2, 0
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; CHECK-NEXT: xvrepli.h $xr2, -256
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; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <32 x i8>, ptr %a0
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%v1 = load <32 x i8>, ptr %a1
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%sel = select <32 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <32 x i8> %v0, <32 x i8> %v1
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store <32 x i8> %sel, ptr %res
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ret void
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}
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define void @select_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
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; CHECK-LABEL: select_v16i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lu12i.w $a3, -16
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; CHECK-NEXT: xvreplgr2vr.w $xr0, $a3
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; CHECK-NEXT: xvld $xr1, $a1, 0
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; CHECK-NEXT: xvld $xr2, $a2, 0
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; CHECK-NEXT: xvbitsel.v $xr0, $xr2, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <16 x i16>, ptr %a0
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%v1 = load <16 x i16>, ptr %a1
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%sel = select <16 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <16 x i16> %v0, <16 x i16> %v1
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store <16 x i16> %sel, ptr %res
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ret void
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}
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define void @select_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
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; CHECK-LABEL: select_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvld $xr1, $a2, 0
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; CHECK-NEXT: ori $a1, $zero, 0
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; CHECK-NEXT: lu32i.d $a1, -1
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; CHECK-NEXT: xvreplgr2vr.d $xr2, $a1
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; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <8 x i32>, ptr %a0
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%v1 = load <8 x i32>, ptr %a1
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%sel = select <8 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <8 x i32> %v0, <8 x i32> %v1
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store <8 x i32> %sel, ptr %res
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ret void
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}
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define void @select_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
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; CHECK-LABEL: select_v4i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pcalau12i $a3, %pc_hi20(.LCPI4_0)
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; CHECK-NEXT: addi.d $a3, $a3, %pc_lo12(.LCPI4_0)
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; CHECK-NEXT: xvld $xr0, $a3, 0
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; CHECK-NEXT: xvld $xr1, $a1, 0
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; CHECK-NEXT: xvld $xr2, $a2, 0
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; CHECK-NEXT: xvbitsel.v $xr0, $xr2, $xr1, $xr0
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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%v0 = load <4 x i64>, ptr %a0
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%v1 = load <4 x i64>, ptr %a1
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%sel = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x i64> %v0, <4 x i64> %v1
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store <4 x i64> %sel, ptr %res
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ret void
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}
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