109 lines
2.4 KiB
LLVM
109 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=riscv32 | FileCheck %s --check-prefixes=RV32
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; RUN: llc < %s -mtriple=riscv64 | FileCheck %s --check-prefixes=RV64
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define signext i32 @test1(i32 signext %x) {
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; RV32-LABEL: test1:
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; RV32: # %bb.0:
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; RV32-NEXT: slli a0, a0, 1
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; RV32-NEXT: addi a0, a0, 1
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test1:
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; RV64: # %bb.0:
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; RV64-NEXT: slliw a0, a0, 1
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; RV64-NEXT: addi a0, a0, 1
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; RV64-NEXT: ret
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%a = shl i32 %x, 1
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%b = or i32 %a, 1
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ret i32 %b
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}
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define i64 @test2(i64 %x) {
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; RV32-LABEL: test2:
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; RV32: # %bb.0:
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; RV32-NEXT: andi a0, a0, -4
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; RV32-NEXT: addi a0, a0, 2
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test2:
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; RV64: # %bb.0:
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; RV64-NEXT: andi a0, a0, -4
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; RV64-NEXT: addi a0, a0, 2
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; RV64-NEXT: ret
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%a = and i64 %x, -4
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%b = or i64 %a, 2
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ret i64 %b
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}
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define signext i32 @test3(i32 signext %x) {
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; RV32-LABEL: test3:
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; RV32: # %bb.0:
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; RV32-NEXT: slli a0, a0, 3
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; RV32-NEXT: addi a0, a0, 6
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test3:
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; RV64: # %bb.0:
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; RV64-NEXT: slliw a0, a0, 3
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; RV64-NEXT: addi a0, a0, 6
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; RV64-NEXT: ret
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%a = shl i32 %x, 3
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%b = add i32 %a, 6
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ret i32 %b
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}
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define i64 @test4(i64 %x) {
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; RV32-LABEL: test4:
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; RV32: # %bb.0:
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; RV32-NEXT: srli a2, a0, 28
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; RV32-NEXT: slli a1, a1, 4
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; RV32-NEXT: or a1, a1, a2
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; RV32-NEXT: slli a0, a0, 4
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; RV32-NEXT: addi a0, a0, 13
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test4:
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; RV64: # %bb.0:
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; RV64-NEXT: slli a0, a0, 4
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; RV64-NEXT: addi a0, a0, 13
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; RV64-NEXT: ret
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%a = shl i64 %x, 4
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%b = add i64 %a, 13
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ret i64 %b
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}
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define signext i32 @test5(i32 signext %x) {
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; RV32-LABEL: test5:
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; RV32: # %bb.0:
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; RV32-NEXT: srli a0, a0, 24
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; RV32-NEXT: addi a0, a0, 256
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test5:
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; RV64: # %bb.0:
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; RV64-NEXT: srliw a0, a0, 24
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; RV64-NEXT: addi a0, a0, 256
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; RV64-NEXT: ret
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%a = lshr i32 %x, 24
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%b = xor i32 %a, 256
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ret i32 %b
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}
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define i64 @test6(i64 %x) {
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; RV32-LABEL: test6:
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; RV32: # %bb.0:
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; RV32-NEXT: srli a1, a1, 22
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; RV32-NEXT: addi a0, a1, 1024
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; RV32-NEXT: li a1, 0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test6:
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; RV64: # %bb.0:
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; RV64-NEXT: srli a0, a0, 54
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; RV64-NEXT: addi a0, a0, 1024
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; RV64-NEXT: ret
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%a = lshr i64 %x, 54
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%b = xor i64 %a, 1024
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ret i64 %b
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}
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