102 lines
3 KiB
LLVM
102 lines
3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64
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; Negative test to ensure we don't try to generate a vector reduce when
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; vector instructions are not available.
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define i32 @reduce_sum_4xi32(<4 x i32> %v) {
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; RV32-LABEL: reduce_sum_4xi32:
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; RV32: # %bb.0:
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; RV32-NEXT: lw a1, 12(a0)
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; RV32-NEXT: lw a2, 4(a0)
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; RV32-NEXT: lw a3, 0(a0)
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; RV32-NEXT: lw a0, 8(a0)
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; RV32-NEXT: add a2, a3, a2
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; RV32-NEXT: add a0, a0, a1
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; RV32-NEXT: add a0, a2, a0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: reduce_sum_4xi32:
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; RV64: # %bb.0:
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; RV64-NEXT: lw a1, 24(a0)
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; RV64-NEXT: lw a2, 8(a0)
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; RV64-NEXT: lw a3, 0(a0)
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; RV64-NEXT: lw a0, 16(a0)
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; RV64-NEXT: add a2, a3, a2
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; RV64-NEXT: add a0, a0, a1
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; RV64-NEXT: addw a0, a2, a0
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; RV64-NEXT: ret
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%e0 = extractelement <4 x i32> %v, i32 0
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%e1 = extractelement <4 x i32> %v, i32 1
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%e2 = extractelement <4 x i32> %v, i32 2
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%e3 = extractelement <4 x i32> %v, i32 3
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%add0 = add i32 %e0, %e1
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%add1 = add i32 %add0, %e2
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%add2 = add i32 %add1, %e3
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ret i32 %add2
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}
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define i32 @reduce_xor_4xi32(<4 x i32> %v) {
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; RV32-LABEL: reduce_xor_4xi32:
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; RV32: # %bb.0:
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; RV32-NEXT: lw a1, 12(a0)
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; RV32-NEXT: lw a2, 4(a0)
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; RV32-NEXT: lw a3, 0(a0)
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; RV32-NEXT: lw a0, 8(a0)
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; RV32-NEXT: xor a2, a3, a2
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; RV32-NEXT: xor a0, a0, a1
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; RV32-NEXT: xor a0, a2, a0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: reduce_xor_4xi32:
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; RV64: # %bb.0:
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; RV64-NEXT: ld a1, 24(a0)
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; RV64-NEXT: ld a2, 8(a0)
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; RV64-NEXT: ld a3, 0(a0)
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; RV64-NEXT: ld a0, 16(a0)
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; RV64-NEXT: xor a2, a3, a2
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; RV64-NEXT: xor a0, a0, a1
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; RV64-NEXT: xor a0, a2, a0
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; RV64-NEXT: ret
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%e0 = extractelement <4 x i32> %v, i32 0
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%e1 = extractelement <4 x i32> %v, i32 1
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%e2 = extractelement <4 x i32> %v, i32 2
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%e3 = extractelement <4 x i32> %v, i32 3
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%xor0 = xor i32 %e0, %e1
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%xor1 = xor i32 %xor0, %e2
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%xor2 = xor i32 %xor1, %e3
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ret i32 %xor2
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}
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define i32 @reduce_or_4xi32(<4 x i32> %v) {
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; RV32-LABEL: reduce_or_4xi32:
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; RV32: # %bb.0:
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; RV32-NEXT: lw a1, 12(a0)
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; RV32-NEXT: lw a2, 4(a0)
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; RV32-NEXT: lw a3, 0(a0)
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; RV32-NEXT: lw a0, 8(a0)
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; RV32-NEXT: or a2, a3, a2
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; RV32-NEXT: or a0, a0, a1
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; RV32-NEXT: or a0, a2, a0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: reduce_or_4xi32:
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; RV64: # %bb.0:
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; RV64-NEXT: ld a1, 24(a0)
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; RV64-NEXT: ld a2, 8(a0)
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; RV64-NEXT: ld a3, 0(a0)
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; RV64-NEXT: ld a0, 16(a0)
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; RV64-NEXT: or a2, a3, a2
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; RV64-NEXT: or a0, a0, a1
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; RV64-NEXT: or a0, a2, a0
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; RV64-NEXT: ret
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%e0 = extractelement <4 x i32> %v, i32 0
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%e1 = extractelement <4 x i32> %v, i32 1
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%e2 = extractelement <4 x i32> %v, i32 2
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%e3 = extractelement <4 x i32> %v, i32 3
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%or0 = or i32 %e0, %e1
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%or1 = or i32 %or0, %e2
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%or2 = or i32 %or1, %e3
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ret i32 %or2
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}
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