57 lines
2.8 KiB
LLVM
57 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; RUN: llc -mtriple=riscv64 -mattr=+v,+f,+m,+zfh,+zvfh \
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; RUN: < %s | FileCheck %s
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declare <16 x i8> @llvm.vector.extract.v16i8.nxv8i8(<vscale x 8 x i8>, i64 immarg)
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declare <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v16i8(<vscale x 8 x i8>, <16 x i8>, i64 immarg)
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declare <vscale x 8 x i8> @llvm.riscv.vslideup.nxv8i8.i64(<vscale x 8 x i8>, <vscale x 8 x i8>, i64, i64, i64 immarg)
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declare <vscale x 2 x i32> @llvm.vector.insert.nxv2i32.v4i32(<vscale x 2 x i32>, <4 x i32>, i64 immarg)
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define void @foo(<vscale x 8 x i8> %0) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -32
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: .cfi_offset ra, -8
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; CHECK-NEXT: .cfi_offset s0, -16
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; CHECK-NEXT: .cfi_offset s1, -24
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; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma
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; CHECK-NEXT: vmv.v.i v9, 0
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; CHECK-NEXT: vsetivli zero, 0, e8, m1, tu, ma
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; CHECK-NEXT: vslideup.vi v9, v10, 0
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; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
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; CHECK-NEXT: vmv.x.s s0, v9
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; CHECK-NEXT: vsetvli zero, zero, e8, m1, tu, ma
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; CHECK-NEXT: vslideup.vi v8, v9, 0
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; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, ma
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; CHECK-NEXT: vmv.x.s s1, v8
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; CHECK-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: li a1, 0
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; CHECK-NEXT: mv a0, s0
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; CHECK-NEXT: mv a2, s1
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; CHECK-NEXT: li a3, 0
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; CHECK-NEXT: li a4, 0
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; CHECK-NEXT: li a5, 0
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; CHECK-NEXT: jalr a1
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; CHECK-NEXT: j .LBB0_1
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%2 = tail call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v16i8(<vscale x 8 x i8> undef, <16 x i8> undef, i64 0)
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%3 = tail call <vscale x 8 x i8> @llvm.vector.insert.nxv8i8.v16i8(<vscale x 8 x i8> undef, <16 x i8> poison, i64 0)
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br label %4
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4: ; preds = %4, %1
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%5 = tail call <vscale x 8 x i8> @llvm.riscv.vslideup.nxv8i8.i64(<vscale x 8 x i8> zeroinitializer, <vscale x 8 x i8> %2, i64 0, i64 0, i64 0)
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%6 = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv8i8(<vscale x 8 x i8> %5, i64 0)
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%7 = bitcast <16 x i8> %6 to <2 x i64>
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%8 = extractelement <2 x i64> %7, i64 0
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%9 = insertvalue [2 x i64] zeroinitializer, i64 %8, 0
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%10 = tail call <vscale x 8 x i8> @llvm.riscv.vslideup.nxv8i8.i64(<vscale x 8 x i8> %0, <vscale x 8 x i8> %3, i64 0, i64 0, i64 0)
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%11 = tail call <16 x i8> @llvm.vector.extract.v16i8.nxv8i8(<vscale x 8 x i8> %10, i64 0)
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%12 = bitcast <16 x i8> %11 to <2 x i64>
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%13 = extractelement <2 x i64> %12, i64 0
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%14 = insertvalue [2 x i64] zeroinitializer, i64 %13, 0
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%15 = tail call fastcc [2 x i64] null([2 x i64] %9, [2 x i64] %14, [2 x i64] zeroinitializer)
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br label %4
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}
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