71 lines
2.1 KiB
LLVM
71 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zvkned \
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; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
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; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zvkned \
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; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
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declare <vscale x 4 x i32> @llvm.riscv.vaeskf1.nxv4i32.i32(
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<vscale x 4 x i32>,
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<vscale x 4 x i32>,
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iXLen,
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iXLen)
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define <vscale x 4 x i32> @intrinsic_vaeskf1_vi_nxv4i32_i32(<vscale x 4 x i32> %0, iXLen %1) nounwind {
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; CHECK-LABEL: intrinsic_vaeskf1_vi_nxv4i32_i32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; CHECK-NEXT: vaeskf1.vi v8, v8, 2
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 4 x i32> @llvm.riscv.vaeskf1.nxv4i32.i32(
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<vscale x 4 x i32> undef,
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<vscale x 4 x i32> %0,
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iXLen 2,
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iXLen %1)
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ret <vscale x 4 x i32> %a
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}
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declare <vscale x 8 x i32> @llvm.riscv.vaeskf1.nxv8i32.i32(
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<vscale x 8 x i32>,
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<vscale x 8 x i32>,
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iXLen,
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iXLen)
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define <vscale x 8 x i32> @intrinsic_vaeskf1_vi_nxv8i32_i32(<vscale x 8 x i32> %0, iXLen %1) nounwind {
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; CHECK-LABEL: intrinsic_vaeskf1_vi_nxv8i32_i32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
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; CHECK-NEXT: vaeskf1.vi v8, v8, 2
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 8 x i32> @llvm.riscv.vaeskf1.nxv8i32.i32(
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<vscale x 8 x i32> undef,
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<vscale x 8 x i32> %0,
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iXLen 2,
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iXLen %1)
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ret <vscale x 8 x i32> %a
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}
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declare <vscale x 16 x i32> @llvm.riscv.vaeskf1.nxv16i32.i32(
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<vscale x 16 x i32>,
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<vscale x 16 x i32>,
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iXLen,
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iXLen)
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define <vscale x 16 x i32> @intrinsic_vaeskf1_vi_nxv16i32_i32(<vscale x 16 x i32> %0, iXLen %1) nounwind {
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; CHECK-LABEL: intrinsic_vaeskf1_vi_nxv16i32_i32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e32, m8, ta, ma
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; CHECK-NEXT: vaeskf1.vi v8, v8, 2
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 16 x i32> @llvm.riscv.vaeskf1.nxv16i32.i32(
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<vscale x 16 x i32> undef,
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<vscale x 16 x i32> %0,
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iXLen 2,
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iXLen %1)
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ret <vscale x 16 x i32> %a
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}
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