85 lines
3.9 KiB
LLVM
85 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+zve64d,+f,+d,+zfh,+zvfh \
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; RUN: -verify-machineinstrs < %s | FileCheck %s
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declare {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.nxv16i16(<vscale x 16 x i16>,<vscale x 16 x i16>, ptr , i32)
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declare {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.mask.nxv16i16(<vscale x 16 x i16>,<vscale x 16 x i16>, ptr, <vscale x 16 x i1>, i32, i32)
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define void @test_vlseg2ff_dead_value(ptr %base, i32 %vl, ptr %outvl) {
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; CHECK-LABEL: test_vlseg2ff_dead_value:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma
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; CHECK-NEXT: vlseg2e16ff.v v8, (a0)
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; CHECK-NEXT: csrr a0, vl
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; CHECK-NEXT: sw a0, 0(a2)
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; CHECK-NEXT: ret
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entry:
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%0 = tail call {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.nxv16i16(<vscale x 16 x i16> undef, <vscale x 16 x i16> undef, ptr %base, i32 %vl)
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%1 = extractvalue {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} %0, 2
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store i32 %1, ptr %outvl
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ret void
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}
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define void @test_vlseg2ff_mask_dead_value(<vscale x 16 x i16> %val, ptr %base, i32 %vl, <vscale x 16 x i1> %mask, ptr %outvl) {
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; CHECK-LABEL: test_vlseg2ff_mask_dead_value:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmv4r.v v12, v8
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu
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; CHECK-NEXT: vlseg2e16ff.v v8, (a0), v0.t
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; CHECK-NEXT: csrr a0, vl
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; CHECK-NEXT: sw a0, 0(a2)
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; CHECK-NEXT: ret
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entry:
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%0 = tail call {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.mask.nxv16i16(<vscale x 16 x i16> %val,<vscale x 16 x i16> %val, ptr %base, <vscale x 16 x i1> %mask, i32 %vl, i32 1)
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%1 = extractvalue {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} %0, 2
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store i32 %1, ptr %outvl
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ret void
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}
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define <vscale x 16 x i16> @test_vlseg2ff_dead_vl(ptr %base, i32 %vl) {
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; CHECK-LABEL: test_vlseg2ff_dead_vl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma
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; CHECK-NEXT: vlseg2e16ff.v v4, (a0)
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; CHECK-NEXT: ret
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entry:
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%0 = tail call {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.nxv16i16(<vscale x 16 x i16> undef, <vscale x 16 x i16> undef, ptr %base, i32 %vl)
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%1 = extractvalue {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} %0, 1
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ret <vscale x 16 x i16> %1
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}
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define <vscale x 16 x i16> @test_vlseg2ff_mask_dead_vl(<vscale x 16 x i16> %val, ptr %base, i32 %vl, <vscale x 16 x i1> %mask) {
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; CHECK-LABEL: test_vlseg2ff_mask_dead_vl:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmv4r.v v4, v8
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu
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; CHECK-NEXT: vlseg2e16ff.v v4, (a0), v0.t
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; CHECK-NEXT: ret
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entry:
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%0 = tail call {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.mask.nxv16i16(<vscale x 16 x i16> %val,<vscale x 16 x i16> %val, ptr %base, <vscale x 16 x i1> %mask, i32 %vl, i32 1)
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%1 = extractvalue {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} %0, 1
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ret <vscale x 16 x i16> %1
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}
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define void @test_vlseg2ff_dead_all(ptr %base, i32 %vl) {
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; CHECK-LABEL: test_vlseg2ff_dead_all:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma
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; CHECK-NEXT: vlseg2e16ff.v v8, (a0)
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; CHECK-NEXT: ret
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entry:
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tail call {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.nxv16i16(<vscale x 16 x i16> undef, <vscale x 16 x i16> undef, ptr %base, i32 %vl)
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ret void
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}
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define void @test_vlseg2ff_mask_dead_all(<vscale x 16 x i16> %val, ptr %base, i32 %vl, <vscale x 16 x i1> %mask) {
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; CHECK-LABEL: test_vlseg2ff_mask_dead_all:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmv4r.v v12, v8
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu
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; CHECK-NEXT: vlseg2e16ff.v v8, (a0), v0.t
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; CHECK-NEXT: ret
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entry:
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tail call {<vscale x 16 x i16>,<vscale x 16 x i16>, i32} @llvm.riscv.vlseg2ff.mask.nxv16i16(<vscale x 16 x i16> %val,<vscale x 16 x i16> %val, ptr %base, <vscale x 16 x i1> %mask, i32 %vl, i32 1)
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ret void
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}
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