105 lines
2.8 KiB
LLVM
105 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -mattr=+v,+m -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+Zve64x,+m -verify-machineinstrs < %s | FileCheck %s
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declare i64 @llvm.vscale.i64()
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define i64 @vscale_lshr(i64 %TC) {
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; CHECK-LABEL: vscale_lshr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: srli a1, a1, 6
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; CHECK-NEXT: addi a1, a1, -1
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; CHECK-NEXT: and a0, a0, a1
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%shifted = lshr i64 %vscale, 3
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%urem = urem i64 %TC, %shifted
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ret i64 %urem
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}
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define i64 @vscale(i64 %TC) {
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; CHECK-LABEL: vscale:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: srli a1, a1, 3
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; CHECK-NEXT: addi a1, a1, -1
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; CHECK-NEXT: and a0, a0, a1
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%urem = urem i64 %TC, %vscale
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ret i64 %urem
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}
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define i64 @vscale_shl(i64 %TC) {
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; CHECK-LABEL: vscale_shl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: addi a1, a1, -1
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; CHECK-NEXT: and a0, a0, a1
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%shifted = shl i64 %vscale, 3
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%urem = urem i64 %TC, %shifted
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ret i64 %urem
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}
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define i64 @TC_minus_rem(i64 %TC) {
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; CHECK-LABEL: TC_minus_rem:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: srli a1, a1, 3
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; CHECK-NEXT: neg a1, a1
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; CHECK-NEXT: and a0, a0, a1
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%urem = urem i64 %TC, %vscale
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%VTC = sub i64 %TC, %urem
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ret i64 %VTC
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}
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define i64 @TC_minus_rem_shl(i64 %TC) {
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; CHECK-LABEL: TC_minus_rem_shl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: neg a1, a1
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; CHECK-NEXT: and a0, a0, a1
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%shifted = shl i64 %vscale, 3
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%urem = urem i64 %TC, %shifted
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%VTC = sub i64 %TC, %urem
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ret i64 %VTC
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}
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define i64 @con1024_minus_rem() {
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; CHECK-LABEL: con1024_minus_rem:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: srli a0, a0, 3
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; CHECK-NEXT: negw a0, a0
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; CHECK-NEXT: andi a0, a0, 1024
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%urem = urem i64 1024, %vscale
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%VTC = sub i64 1024, %urem
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ret i64 %VTC
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}
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; Maximum VLEN=64k implies Maximum vscale=1024.
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; TODO: This should fold to 2048
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define i64 @con2048_minus_rem() {
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; CHECK-LABEL: con2048_minus_rem:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: srli a0, a0, 3
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; CHECK-NEXT: neg a0, a0
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; CHECK-NEXT: li a1, 1
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; CHECK-NEXT: slli a1, a1, 11
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; CHECK-NEXT: and a0, a0, a1
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; CHECK-NEXT: ret
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%vscale = call i64 @llvm.vscale.i64()
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%urem = urem i64 2048, %vscale
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%VTC = sub i64 2048, %urem
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ret i64 %VTC
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}
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