31 lines
860 B
LLVM
31 lines
860 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; Test 128-bit AND / AND-NOT in vector registers on z13
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; And.
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define i128 @f1(i128 %a, i128 %b) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vn %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = and i128 %a, %b
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ret i128 %res
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}
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; And with complement.
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define i128 @f2(i128 %a, i128 %b) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vnc %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%notb = xor i128 %b, -1
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%res = and i128 %a, %notb
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ret i128 %res
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}
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