224 lines
7.2 KiB
YAML
224 lines
7.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
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# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X86
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--- |
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define void @test_gep_i8c(ptr %addr) {
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%arrayidx = getelementptr i32, ptr undef, i8 5
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ret void
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}
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define void @test_gep_i8(ptr %addr, i8 %ofs) {
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%arrayidx = getelementptr i32, ptr undef, i8 %ofs
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ret void
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}
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define void @test_gep_i16c(ptr %addr) {
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%arrayidx = getelementptr i32, ptr undef, i16 5
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ret void
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}
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define void @test_gep_i16(ptr %addr, i16 %ofs) {
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%arrayidx = getelementptr i32, ptr undef, i16 %ofs
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ret void
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}
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define void @test_gep_i32c(ptr %addr) {
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%arrayidx = getelementptr i32, ptr undef, i32 5
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ret void
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}
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define void @test_gep_i32(ptr %addr, i32 %ofs) {
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%arrayidx = getelementptr i32, ptr undef, i32 %ofs
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ret void
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}
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define void @test_gep_i64c(ptr %addr) {
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%arrayidx = getelementptr i32, ptr undef, i64 5
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ret void
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}
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define void @test_gep_i64(ptr %addr, i64 %ofs) {
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%arrayidx = getelementptr i32, ptr undef, i64 %ofs
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ret void
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}
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...
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---
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name: test_gep_i8c
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: test_gep_i8c
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
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; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; CHECK-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s8) = G_CONSTANT i8 20
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%2(p0) = G_PTR_ADD %0, %1(s8)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i8
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: test_gep_i8
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s8) = IMPLICIT_DEF
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; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[DEF1]](s8)
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[SEXT]](s32)
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; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; CHECK-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s8) = IMPLICIT_DEF
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%2(p0) = G_PTR_ADD %0, %1(s8)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i16c
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: test_gep_i16c
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
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; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; CHECK-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s16) = G_CONSTANT i16 20
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%2(p0) = G_PTR_ADD %0, %1(s16)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i16
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: test_gep_i16
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s16) = IMPLICIT_DEF
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; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[DEF1]](s16)
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[SEXT]](s32)
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; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; CHECK-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s16) = IMPLICIT_DEF
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%2(p0) = G_PTR_ADD %0, %1(s16)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i32c
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: test_gep_i32c
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
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; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; CHECK-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s32) = G_CONSTANT i32 20
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%2(p0) = G_PTR_ADD %0, %1(s32)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i32
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: test_gep_i32
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
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; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[DEF1]](s32)
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; CHECK-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; CHECK-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s32) = IMPLICIT_DEF
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%2(p0) = G_PTR_ADD %0, %1(s32)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i64c
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; X64-LABEL: name: test_gep_i64c
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; X64: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; X64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 20
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; X64-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s64)
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; X64-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; X64-NEXT: RET 0
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; X86-LABEL: name: test_gep_i64c
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; X86: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
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; X86-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
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; X86-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; X86-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s64) = G_CONSTANT i64 20
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%2(p0) = G_PTR_ADD %0, %1(s64)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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---
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name: test_gep_i64
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legalized: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; X64-LABEL: name: test_gep_i64
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; X64: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; X64-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X64-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[DEF1]](s64)
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; X64-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; X64-NEXT: RET 0
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; X86-LABEL: name: test_gep_i64
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; X86: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
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; X86-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF1]](s64)
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; X86-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[TRUNC]](s32)
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; X86-NEXT: G_STORE [[PTR_ADD]](p0), [[DEF]](p0) :: (store (p0) into %ir.addr)
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; X86-NEXT: RET 0
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%0(p0) = IMPLICIT_DEF
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%1(s64) = IMPLICIT_DEF
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%2(p0) = G_PTR_ADD %0, %1(s64)
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G_STORE %2, %0 :: (store (p0) into %ir.addr)
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RET 0
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...
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