55 lines
1.7 KiB
LLVM
55 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s --check-prefix=X64
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; The computation of %t4 should match a single lea, without using actual add instructions.
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define i32 @test1(i32 %A, i32 %B) {
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; X86-LABEL: test1:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: leal -5(%ecx,%eax,4), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal -5(%rsi,%rdi,4), %eax
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; X64-NEXT: retq
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%t1 = shl i32 %A, 2
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%t3 = add i32 %B, -5
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%t4 = add i32 %t3, %t1
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ret i32 %t4
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}
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; The addlike OR instruction should fold into the LEA.
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define i64 @test2(i32 %a0, i64 %a1) {
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; X86-LABEL: test2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl %edx, %eax
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; X86-NEXT: andl $2147483640, %eax # imm = 0x7FFFFFF8
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; X86-NEXT: shrl $31, %edx
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; X86-NEXT: leal 4(%eax,%eax), %eax
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; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $-8, %edi
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; X64-NEXT: leaq 4(%rsi,%rdi,2), %rax
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; X64-NEXT: retq
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%x1 = and i32 %a0, -8
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%x2 = or i32 %x1, 2
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%x3 = zext i32 %x2 to i64
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%x4 = shl i64 %x3, 1
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%x5 = add i64 %a1, %x4
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ret i64 %x5
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}
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