bolt/deps/llvm-18.1.8/llvm/test/CodeGen/X86/pr26652.ll
2025-02-14 19:21:04 +01:00

9 lines
228 B
LLVM

; RUN: llc < %s -mtriple=i686--
; PR26652
define <2 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
entry:
%0 = or <4 x i32> %a, %b
%1 = shufflevector <4 x i32> %0, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
ret <2 x i32> %1
}