137 lines
3.7 KiB
LLVM
137 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X64
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define i32 @i32_zext_shift_i16_zext_i1(i1 %a0) nounwind {
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; CHECK-LABEL: i32_zext_shift_i16_zext_i1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: ret{{[l|q]}}
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%t0 = zext i1 %a0 to i16
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%t1 = lshr i16 %t0, 5
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%t2 = zext i16 %t1 to i32
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ret i32 %t2
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}
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define i32 @i32_zext_shift_i16_zext_i8(i8 %a0) nounwind {
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; X86-LABEL: i32_zext_shift_i16_zext_i8:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrl $5, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: i32_zext_shift_i16_zext_i8:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: shrl $5, %eax
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; X64-NEXT: retq
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%t0 = zext i8 %a0 to i16
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%t1 = lshr i16 %t0, 5
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%t2 = zext i16 %t1 to i32
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ret i32 %t2
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}
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define i64 @i64_zext_shift_i16_zext_i8(i8 %a0) nounwind {
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; X86-LABEL: i64_zext_shift_i16_zext_i8:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrl $5, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: i64_zext_shift_i16_zext_i8:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: shrl $5, %eax
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; X64-NEXT: retq
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%t0 = zext i8 %a0 to i16
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%t1 = lshr i16 %t0, 5
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%t2 = zext i16 %t1 to i64
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ret i64 %t2
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}
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define i64 @i64_zext_shift_i32_zext_i8(i8 %a0) nounwind {
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; X86-LABEL: i64_zext_shift_i32_zext_i8:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrl $3, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: i64_zext_shift_i32_zext_i8:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: shrl $3, %eax
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; X64-NEXT: retq
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%t0 = zext i8 %a0 to i32
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%t1 = lshr i32 %t0, 3
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%t2 = zext i32 %t1 to i64
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ret i64 %t2
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}
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define i64 @i64_zext_shift_i32_zext_i16(i16 %a0) nounwind {
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; X86-LABEL: i64_zext_shift_i32_zext_i16:
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; X86: # %bb.0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrl $5, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: i64_zext_shift_i32_zext_i16:
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; X64: # %bb.0:
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; X64-NEXT: movzwl %di, %eax
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; X64-NEXT: shrl $5, %eax
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; X64-NEXT: retq
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%t0 = zext i16 %a0 to i32
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%t1 = lshr i32 %t0, 5
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%t2 = zext i32 %t1 to i64
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ret i64 %t2
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}
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define i128 @i128_zext_shift_i64_zext_i8(i8 %a0) nounwind {
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; X86-LABEL: i128_zext_shift_i64_zext_i8:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: shrl $4, %ecx
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; X86-NEXT: movl %ecx, (%eax)
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; X86-NEXT: movl $0, 12(%eax)
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; X86-NEXT: movl $0, 8(%eax)
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; X86-NEXT: movl $0, 4(%eax)
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; X86-NEXT: retl $4
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;
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; X64-LABEL: i128_zext_shift_i64_zext_i8:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: shrl $4, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: retq
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%t0 = zext i8 %a0 to i64
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%t1 = lshr i64 %t0, 4
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%t2 = zext i64 %t1 to i128
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ret i128 %t2
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}
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define i128 @i128_zext_shift_i64_zext_i16(i16 %a0) nounwind {
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; X86-LABEL: i128_zext_shift_i64_zext_i16:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: shrl $7, %ecx
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; X86-NEXT: movl %ecx, (%eax)
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; X86-NEXT: movl $0, 12(%eax)
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; X86-NEXT: movl $0, 8(%eax)
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; X86-NEXT: movl $0, 4(%eax)
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; X86-NEXT: retl $4
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;
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; X64-LABEL: i128_zext_shift_i64_zext_i16:
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; X64: # %bb.0:
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; X64-NEXT: movzwl %di, %eax
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; X64-NEXT: shrl $7, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: retq
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%t0 = zext i16 %a0 to i64
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%t1 = lshr i64 %t0,7
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%t2 = zext i64 %t1 to i128
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ret i128 %t2
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}
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