132 lines
3.9 KiB
ArmAsm
132 lines
3.9 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=-neon,+sme < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=-neon < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=-neon,+sme < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-INST
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// Disassemble encoding and check the re-encoding (-show-encoding) matches.
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=-neon,+sme < %s \
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// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
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// RUN: | llvm-mc -triple=aarch64 -mattr=-neon,+sme -disassemble -show-encoding \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// Scalar FP instructions
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fmulx s0, s1, s2
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// CHECK-INST: fmulx s0, s1, s2
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// CHECK-ENCODING: [0x20,0xdc,0x22,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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fmulx d0, d1, d2
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// CHECK-INST: fmulx d0, d1, d2
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// CHECK-ENCODING: [0x20,0xdc,0x62,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frecps s0, s1, s2
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// CHECK-INST: frecps s0, s1, s2
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// CHECK-ENCODING: [0x20,0xfc,0x22,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frecps d0, d1, d2
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// CHECK-INST: frecps d0, d1, d2
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// CHECK-ENCODING: [0x20,0xfc,0x62,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frsqrts s0, s1, s2
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// CHECK-INST: frsqrts s0, s1, s2
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// CHECK-ENCODING: [0x20,0xfc,0xa2,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frsqrts d0, d1, d2
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// CHECK-INST: frsqrts d0, d1, d2
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// CHECK-ENCODING: [0x20,0xfc,0xe2,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frecpe s0, s1
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// CHECK-INST: frecpe s0, s1
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// CHECK-ENCODING: [0x20,0xd8,0xa1,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frecpe d0, d1
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// CHECK-INST: frecpe d0, d1
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// CHECK-ENCODING: [0x20,0xd8,0xe1,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frecpx s0, s1
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// CHECK-INST: frecpx s0, s1
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// CHECK-ENCODING: [0x20,0xf8,0xa1,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frecpx d0, d1
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// CHECK-INST: frecpx d0, d1
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// CHECK-ENCODING: [0x20,0xf8,0xe1,0x5e]
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// CHECK-ERROR: instruction requires: neon or sme
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frsqrte s0, s1
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// CHECK-INST: frsqrte s0, s1
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// CHECK-ENCODING: [0x20,0xd8,0xa1,0x7e]
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// CHECK-ERROR: instruction requires: neon or sme
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frsqrte d0, d1
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// CHECK-INST: frsqrte d0, d1
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// CHECK-ENCODING: [0x20,0xd8,0xe1,0x7e]
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// CHECK-ERROR: instruction requires: neon or sme
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// Vector to GPR integer move instructions
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smov w0, v0.b[0]
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// CHECK-INST: smov w0, v0.b[0]
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// CHECK-ENCODING: [0x00,0x2c,0x01,0x0e]
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// CHECK-ERROR: instruction requires: neon
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smov x0, v0.b[0]
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// CHECK-INST: smov x0, v0.b[0]
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// CHECK-ENCODING: [0x00,0x2c,0x01,0x4e]
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// CHECK-ERROR: instruction requires: neon
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smov w0, v0.h[0]
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// CHECK-INST: smov w0, v0.h[0]
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// CHECK-ENCODING: [0x00,0x2c,0x02,0x0e]
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// CHECK-ERROR: instruction requires: neon
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smov x0, v0.h[0]
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// CHECK-INST: smov x0, v0.h[0]
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// CHECK-ENCODING: [0x00,0x2c,0x02,0x4e]
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// CHECK-ERROR: instruction requires: neon
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smov x0, v0.s[0]
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// CHECK-INST: smov x0, v0.s[0]
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// CHECK-ENCODING: [0x00,0x2c,0x04,0x4e]
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// CHECK-ERROR: instruction requires: neon
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umov w0, v0.b[0]
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// CHECK-INST: umov w0, v0.b[0]
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// CHECK-ENCODING: [0x00,0x3c,0x01,0x0e]
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// CHECK-ERROR: instruction requires: neon
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umov w0, v0.h[0]
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// CHECK-INST: umov w0, v0.h[0]
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// CHECK-ENCODING: [0x00,0x3c,0x02,0x0e]
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// CHECK-ERROR: instruction requires: neon
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umov w0, v0.s[0]
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// CHECK-INST: mov w0, v0.s[0]
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// CHECK-ENCODING: [0x00,0x3c,0x04,0x0e]
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// CHECK-ERROR: instruction requires: neon
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umov x0, v0.d[0]
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// CHECK-INST: mov x0, v0.d[0]
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// CHECK-ENCODING: [0x00,0x3c,0x08,0x4e]
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// CHECK-ERROR: instruction requires: neon
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// Aliases
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mov w0, v0.s[0]
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// CHECK-INST: mov w0, v0.s[0]
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// CHECK-ENCODING: [0x00,0x3c,0x04,0x0e]
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// CHECK-ERROR: instruction requires: neon
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mov x0, v0.d[0]
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// CHECK-INST: mov x0, v0.d[0]
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// CHECK-ENCODING: [0x00,0x3c,0x08,0x4e]
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// CHECK-ERROR: instruction requires: neon
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