35 lines
1.5 KiB
ArmAsm
35 lines
1.5 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid predicate register
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bfmopa za1.h, p8/m, p5/m, z12.h, z11.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: bfmopa za1.h, p8/m, p5/m, z12.h, z11.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfmopa za1.h, p5/m, p8/m, z12.h, z11.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: bfmopa za1.h, p5/m, p8/m, z12.h, z11.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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bfmopa za1.h, p5.h, p5/m, z12.h, z11.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: bfmopa za1.h, p5.h, p5/m, z12.h, z11.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid matrix operand
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bfmopa za2.h, p5/m, p5/m, z12.h, z11.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: bfmopa za2.h, p5/m, p5/m, z12.h, z11.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid register suffixes
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bfmopa za1.h, p5/m, p5/m, z12.h, z11.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: bfmopa za1.h, p5/m, p5/m, z12.h, z11.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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