bolt/deps/llvm-18.1.8/llvm/test/MC/AArch64/SVE/ctermeq-diagnostics.s
2025-02-14 19:21:04 +01:00

25 lines
838 B
ArmAsm

// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
ctermeq w30, wsp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: ctermeq w30, wsp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
ctermeq w30, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: ctermeq w30, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
ctermeq wsp, w30
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: ctermeq wsp, w30
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
ctermeq x0, w30
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: ctermeq x0, w30
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: