bolt/deps/llvm-18.1.8/llvm/test/MC/AArch64/SVE/directive-cpu-negative.s
2025-02-14 19:21:04 +01:00

6 lines
205 B
ArmAsm

// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
.cpu generic+sve+nosve
ptrue p0.b, pow2
// CHECK: error: instruction requires: sve or sme
// CHECK-NEXT: ptrue p0.b, pow2