bolt/deps/llvm-18.1.8/llvm/test/MC/Hexagon/quad_regs.s
2025-02-14 19:21:04 +01:00

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ArmAsm

# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv66 --mattr=+hvx -d - | FileCheck %s
# Test for quad register parsing and printing
# CHECK: { v3:0.w = vrmpyz(v0.b,r0.b) }
v3:0.w = vrmpyz(v0.b,r0.b)