bolt/deps/llvm-18.1.8/llvm/test/MC/Hexagon/zreg-post-inc.s
2025-02-14 19:21:04 +01:00

8 lines
260 B
ArmAsm

# RUN: not llvm-mc -triple=hexagon -filetype=obj -mhvx -mcpu=hexagonv66 %s 2> %t; FileCheck --implicit-check-not=error: %s <%t
{
if (p0) memb(r14+#8)=r4.new
if (p0) z=vmem(r4++#0)
}
# CHECK: error: Instruction does not have a valid new register producer