200 lines
8.1 KiB
LLVM
200 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs
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; RUN: opt -S -passes=verify,iroutliner -ir-outlining-no-cost < %s | FileCheck %s
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; Here we have multiple exits, but the different sources, same outputs are
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; needed, this checks that they are compressed, and moved into the appropriate
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; output blocks.
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define void @outline_outputs1() #0 {
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entry:
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%output = alloca i32, align 4
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%result = alloca i32, align 4
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%output2 = alloca i32, align 4
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%result2 = alloca i32, align 4
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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br label %block_2
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block_1:
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%a2 = alloca i32, align 4
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%b2 = alloca i32, align 4
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br label %block_2
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block_2:
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%a2val = load i32, ptr %a
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%b2val = load i32, ptr %b
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%add2 = add i32 2, %a2val
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%mul2 = mul i32 2, %b2val
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br label %block_5
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block_3:
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%aval = load i32, ptr %a
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%bval = load i32, ptr %b
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%add = add i32 2, %aval
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%mul = mul i32 2, %bval
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br label %block_4
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block_4:
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store i32 %add, ptr %output, align 4
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store i32 %mul, ptr %result, align 4
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br label %block_6
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block_5:
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store i32 %add2, ptr %output, align 4
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store i32 %mul2, ptr %result, align 4
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br label %block_7
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block_6:
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%div = udiv i32 %aval, %bval
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ret void
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block_7:
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%sub = sub i32 %a2val, %b2val
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ret void
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}
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define void @outline_outputs2() #0 {
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entry:
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%output = alloca i32, align 4
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%result = alloca i32, align 4
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%output2 = alloca i32, align 4
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%result2 = alloca i32, align 4
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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br label %block_2
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block_1:
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%a2 = alloca i32, align 4
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%b2 = alloca i32, align 4
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br label %block_2
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block_2:
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%a2val = load i32, ptr %a
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%b2val = load i32, ptr %b
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%add2 = add i32 2, %a2val
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%mul2 = mul i32 2, %b2val
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br label %block_5
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block_3:
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%aval = load i32, ptr %a
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%bval = load i32, ptr %b
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%add = add i32 2, %aval
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%mul = mul i32 2, %bval
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br label %block_4
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block_4:
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store i32 %add, ptr %output, align 4
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store i32 %mul, ptr %result, align 4
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br label %block_7
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block_5:
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store i32 %add2, ptr %output, align 4
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store i32 %mul2, ptr %result, align 4
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br label %block_6
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block_6:
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%diff = sub i32 %a2val, %b2val
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ret void
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block_7:
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%quot = udiv i32 %aval, %bval
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ret void
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}
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; CHECK-LABEL: @outline_outputs1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[BVAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[AVAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B2VAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A2VAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[OUTPUT2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[RESULT2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br label [[BLOCK_2:%.*]]
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; CHECK: block_1:
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; CHECK-NEXT: [[A2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br label [[BLOCK_2]]
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; CHECK: block_2:
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[A2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[B2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[AVAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[BVAL_LOC]])
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; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]], ptr [[A2VAL_LOC]], ptr [[B2VAL_LOC]], ptr [[AVAL_LOC]], ptr [[BVAL_LOC]])
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; CHECK-NEXT: [[A2VAL_RELOAD:%.*]] = load i32, ptr [[A2VAL_LOC]], align 4
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; CHECK-NEXT: [[B2VAL_RELOAD:%.*]] = load i32, ptr [[B2VAL_LOC]], align 4
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; CHECK-NEXT: [[AVAL_RELOAD:%.*]] = load i32, ptr [[AVAL_LOC]], align 4
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; CHECK-NEXT: [[BVAL_RELOAD:%.*]] = load i32, ptr [[BVAL_LOC]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[A2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[B2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[AVAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[BVAL_LOC]])
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; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[BLOCK_6:%.*]], label [[BLOCK_7:%.*]]
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; CHECK: block_6:
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[AVAL_RELOAD]], [[BVAL_RELOAD]]
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; CHECK-NEXT: ret void
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; CHECK: block_7:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A2VAL_RELOAD]], [[B2VAL_RELOAD]]
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; CHECK-NEXT: ret void
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;
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;
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; CHECK-LABEL: @outline_outputs2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[BVAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[AVAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B2VAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A2VAL_LOC:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[OUTPUT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[RESULT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[OUTPUT2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[RESULT2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br label [[BLOCK_2:%.*]]
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; CHECK: block_1:
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; CHECK-NEXT: [[A2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[B2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br label [[BLOCK_2]]
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; CHECK: block_2:
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[A2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[B2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[AVAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 -1, ptr [[BVAL_LOC]])
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; CHECK-NEXT: [[TARGETBLOCK:%.*]] = call i1 @outlined_ir_func_0(ptr [[A]], ptr [[B]], ptr [[OUTPUT]], ptr [[RESULT]], ptr [[A2VAL_LOC]], ptr [[B2VAL_LOC]], ptr [[AVAL_LOC]], ptr [[BVAL_LOC]])
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; CHECK-NEXT: [[A2VAL_RELOAD:%.*]] = load i32, ptr [[A2VAL_LOC]], align 4
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; CHECK-NEXT: [[B2VAL_RELOAD:%.*]] = load i32, ptr [[B2VAL_LOC]], align 4
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; CHECK-NEXT: [[AVAL_RELOAD:%.*]] = load i32, ptr [[AVAL_LOC]], align 4
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; CHECK-NEXT: [[BVAL_RELOAD:%.*]] = load i32, ptr [[BVAL_LOC]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[A2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[B2VAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[AVAL_LOC]])
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; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 -1, ptr [[BVAL_LOC]])
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; CHECK-NEXT: br i1 [[TARGETBLOCK]], label [[BLOCK_7:%.*]], label [[BLOCK_6:%.*]]
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; CHECK: block_6:
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; CHECK-NEXT: [[DIFF:%.*]] = sub i32 [[A2VAL_RELOAD]], [[B2VAL_RELOAD]]
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; CHECK-NEXT: ret void
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; CHECK: block_7:
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; CHECK-NEXT: [[QUOT:%.*]] = udiv i32 [[AVAL_RELOAD]], [[BVAL_RELOAD]]
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; CHECK-NEXT: ret void
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;
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;
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; CHECK: define internal i1 @outlined_ir_func_0(
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; CHECK-NEXT: newFuncRoot:
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; CHECK-NEXT: br label [[BLOCK_2_TO_OUTLINE:%.*]]
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; CHECK: block_2_to_outline:
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; CHECK-NEXT: [[A2VAL:%.*]] = load i32, ptr [[TMP0:%.*]], align 4
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; CHECK-NEXT: [[B2VAL:%.*]] = load i32, ptr [[TMP1:%.*]], align 4
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; CHECK-NEXT: [[ADD2:%.*]] = add i32 2, [[A2VAL]]
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; CHECK-NEXT: [[MUL2:%.*]] = mul i32 2, [[B2VAL]]
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; CHECK-NEXT: br label [[BLOCK_5:%.*]]
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; CHECK: block_3:
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; CHECK-NEXT: [[AVAL:%.*]] = load i32, ptr [[TMP0]], align 4
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; CHECK-NEXT: [[BVAL:%.*]] = load i32, ptr [[TMP1]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 2, [[AVAL]]
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 2, [[BVAL]]
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; CHECK-NEXT: br label [[BLOCK_4:%.*]]
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; CHECK: block_4:
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; CHECK-NEXT: store i32 [[ADD]], ptr [[TMP2:%.*]], align 4
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; CHECK-NEXT: store i32 [[MUL]], ptr [[TMP3:%.*]], align 4
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; CHECK-NEXT: br label [[BLOCK_6_EXITSTUB:%.*]]
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; CHECK: block_5:
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; CHECK-NEXT: store i32 [[ADD2]], ptr [[TMP2]], align 4
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; CHECK-NEXT: store i32 [[MUL2]], ptr [[TMP3]], align 4
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; CHECK-NEXT: br label [[BLOCK_7_EXITSTUB:%.*]]
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; CHECK: block_6.exitStub:
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; CHECK-NEXT: store i32 [[AVAL]], ptr [[TMP6:%.*]], align 4
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; CHECK-NEXT: store i32 [[BVAL]], ptr [[TMP7:%.*]], align 4
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; CHECK-NEXT: ret i1 true
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; CHECK: block_7.exitStub:
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; CHECK-NEXT: store i32 [[A2VAL]], ptr [[TMP4:%.*]], align 4
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; CHECK-NEXT: store i32 [[B2VAL]], ptr [[TMP5:%.*]], align 4
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; CHECK-NEXT: ret i1 false
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;
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