85 lines
2.8 KiB
LLVM
85 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=licm < %s | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa -passes='require<aa>,require<targetir>,require<scalar-evolution>,require<opt-remark-emit>,loop-mssa(licm)' -S %s| FileCheck %s
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;
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; Manually validate LCSSA form is preserved even after SSAUpdater is used to
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; promote things in the loop bodies.
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@x = common global i32 0, align 4
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@y = common global i32 0, align 4
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define void @PR18688() {
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; CHECK-LABEL: @PR18688(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 undef, label [[RETURN:%.*]], label [[OUTER_PREHEADER:%.*]]
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; CHECK: outer.preheader:
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; CHECK-NEXT: [[Y_VAL:%.*]] = load i32, ptr @y, align 4
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; CHECK-NEXT: [[ICMP:%.*]] = icmp eq i32 [[Y_VAL]], 0
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; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
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; CHECK: outer.header:
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; CHECK-NEXT: br i1 undef, label [[OUTER_LATCH:%.*]], label [[INNER_PREHEADER:%.*]]
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; CHECK: inner.preheader:
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; CHECK-NEXT: br label [[INNER_HEADER:%.*]]
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; CHECK: inner.header:
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; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[TMP1:%.*]], [[INNER_LATCH:%.*]] ], [ 0, [[INNER_PREHEADER]] ]
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; CHECK-NEXT: br i1 undef, label [[INNER_BODY_RHS:%.*]], label [[INNER_LATCH]]
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; CHECK: inner.body.rhs:
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; CHECK-NEXT: br label [[INNER_LATCH]]
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; CHECK: inner.latch:
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; CHECK-NEXT: [[TMP1]] = phi i32 [ 0, [[INNER_BODY_RHS]] ], [ [[TMP0]], [[INNER_HEADER]] ]
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; CHECK-NEXT: br i1 [[ICMP]], label [[INNER_EXIT:%.*]], label [[INNER_HEADER]]
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; CHECK: inner.exit:
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; CHECK-NEXT: [[DOTLCSSA1:%.*]] = phi i32 [ [[TMP1]], [[INNER_LATCH]] ]
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; CHECK-NEXT: br label [[OUTER_LATCH]]
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; CHECK: outer.latch:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[DOTLCSSA1]], [[INNER_EXIT]] ], [ 0, [[OUTER_HEADER]] ]
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; CHECK-NEXT: br i1 true, label [[OUTER_EXIT:%.*]], label [[OUTER_HEADER]]
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; CHECK: outer.exit:
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; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP2]], [[OUTER_LATCH]] ]
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; CHECK-NEXT: store i32 [[DOTLCSSA]], ptr @x, align 4
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; CHECK-NEXT: br label [[RETURN]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 undef, label %return, label %outer.preheader
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outer.preheader:
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br label %outer.header
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outer.header:
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store i32 0, ptr @x, align 4
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br i1 undef, label %outer.latch, label %inner.preheader
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inner.preheader:
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br label %inner.header
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inner.header:
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br i1 undef, label %inner.body.rhs, label %inner.latch
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inner.body.rhs:
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store i32 0, ptr @x, align 4
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br label %inner.latch
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inner.latch:
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%y_val = load i32, ptr @y, align 4
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%icmp = icmp eq i32 %y_val, 0
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br i1 %icmp, label %inner.exit, label %inner.header
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inner.exit:
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br label %outer.latch
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outer.latch:
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br i1 undef, label %outer.exit, label %outer.header
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outer.exit:
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br label %return
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return:
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ret void
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}
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