bolt/deps/llvm-18.1.8/llvm/test/Transforms/SCCP/2009-05-27-VectorOperandZero.ll
2025-02-14 19:21:04 +01:00

10 lines
184 B
LLVM

; RUN: opt < %s -passes=sccp -disable-output
; PR4277
define i32 @main() nounwind {
entry:
%0 = tail call signext i8 (...) @sin() nounwind
ret i32 0
}
declare signext i8 @sin(...)