221 lines
6.3 KiB
YAML
221 lines
6.3 KiB
YAML
## Tests llvm-dwarfdump handling of AMDGPU relocations. We provide a .debug_info
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## section with multiple DW_AT_high_pc entries (that's one of the attributes for
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## which relocations are resolved by llvm-dwarfdump) and we add a relocation for
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## each of them. The first YAML document represents an amdgcn code object, and
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## the second an r600 code object.
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# RUN: yaml2obj --docnum=1 -DMACH= %s \
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# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=AMDGCN,UNKNOWN %s
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# RUN: yaml2obj --docnum=1 -DMACH=EF_AMDGPU_MACH_AMDGCN_GFX803 %s \
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# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=AMDGCN,KNOWN %s
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# RUN: yaml2obj --docnum=2 -DMACH= %s \
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# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=R600,UNKNOWN %s
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# RUN: yaml2obj --docnum=2 -DMACH=EF_AMDGPU_MACH_R600_R600 %s \
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# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=R600,KNOWN %s
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# UNKNOWN: -: Error in creating MCRegInfo
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# KNOWN-NOT: -: Error in creating MCRegInfo
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# AMDGCN: -: file format elf64-amdgpu
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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2LSB
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OSABI: ELFOSABI_AMDGPU_HSA
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ABIVersion: 0x02
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Type: ET_REL
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Machine: EM_AMDGPU
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Flags: [[[MACH]]]
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DWARF:
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debug_abbrev:
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- Table:
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- Code: 1
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Tag: DW_TAG_compile_unit
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Children: DW_CHILDREN_no
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Attributes:
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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debug_info:
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- Version: 4
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AddrSize: 8
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Entries:
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- AbbrCode: 1
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Values:
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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- Value: 0x4242424242424242
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Sections:
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- Name: .rela.debug_info
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Type: SHT_RELA
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Flags: [ SHF_INFO_LINK ]
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AddressAlign: 0x0000000000000008
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Info: .debug_info
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Relocations:
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# AMDGCN: DW_AT_high_pc (0x0000000000000001)
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- Offset: 0x000000000000000C # 0xC + 8*0
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Type: R_AMDGPU_ABS64
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Symbol: v1
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Addend: 0x0
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# AMDGCN-NEXT: DW_AT_high_pc (0x0000000000000043)
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- Offset: 0x0000000000000014 # 0xC + 8*1
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Type: R_AMDGPU_ABS64
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Symbol: v1
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Addend: 0x42
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# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
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- Offset: 0x000000000000001C # 0xC + 8*2
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Type: R_AMDGPU_ABS64
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Symbol: v0
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Addend: 0xffffffffffffffff
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# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
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- Offset: 0x0000000000000024 # 0xC + 8*3
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Type: R_AMDGPU_ABS64
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Symbol: vffffffffffffffff
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Addend: 0x0
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# AMDGCN: DW_AT_high_pc (0x0000000000000001)
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- Offset: 0x000000000000002C # 0xC + 8*4
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Type: R_AMDGPU_ABS32
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Symbol: v1
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Addend: 0x0
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# AMDGCN-NEXT: DW_AT_high_pc (0x0000000000000043)
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- Offset: 0x0000000000000034 # 0xC + 8*5
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Type: R_AMDGPU_ABS32
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Symbol: v1
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Addend: 0x42
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# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
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- Offset: 0x000000000000003C # 0xC + 8*6
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Type: R_AMDGPU_ABS32
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Symbol: v0
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Addend: 0xffffffffffffffff
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# AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff)
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- Offset: 0x0000000000000044 # 0xC + 8*7
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Type: R_AMDGPU_ABS32
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Symbol: vffffffffffffffff
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Addend: 0x0
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Symbols:
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- Name: v0
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x0
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- Name: v1
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x1
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- Name: vffffffffffffffff
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Type: STT_SECTION
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Section: .debug_info
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Value: 0xffffffffffffffff
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...
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# R600: -: file format elf32-amdgpu
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--- !ELF
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FileHeader:
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Class: ELFCLASS32
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Data: ELFDATA2LSB
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Type: ET_REL
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Machine: EM_AMDGPU
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Flags: [[[MACH]]]
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DWARF:
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debug_abbrev:
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- Table:
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- Code: 0x00000001
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Tag: DW_TAG_compile_unit
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Children: DW_CHILDREN_no
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Attributes:
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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- Attribute: DW_AT_high_pc
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Form: DW_FORM_addr
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debug_info:
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- Version: 4
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AddrSize: 4
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Entries:
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- AbbrCode: 1
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Values:
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- Value: 0x42424242
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- Value: 0x42424242
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- Value: 0x42424242
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- Value: 0x42424242
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Sections:
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- Name: .rela.debug_info
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Type: SHT_RELA
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Flags: [ SHF_INFO_LINK ]
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AddressAlign: 0x0000000000000001
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Info: .debug_info
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Relocations:
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## FIXME: Is R_AMDGPU_ABS64 meaningful here?
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# R600: DW_AT_high_pc (0x00000001)
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- Offset: 0x0000000C # 0xC + 4*0
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Type: R_AMDGPU_ABS32
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Symbol: v1
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Addend: 0x0
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# R600-NEXT: DW_AT_high_pc (0x00000043)
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- Offset: 0x00000010 # 0xC + 4*1
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Type: R_AMDGPU_ABS32
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Symbol: v1
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Addend: 0x42
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## FIXME: Why is this field printed as sign-extended 64-bit in a 32-bit executable?
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# R600-NEXT: DW_AT_high_pc (0xffffffffffffffff)
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- Offset: 0x00000014 # 0xC + 4*2
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Type: R_AMDGPU_ABS32
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Symbol: v0
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Addend: 0xffffffff
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# R600-NEXT: DW_AT_high_pc (0xffffffff)
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- Offset: 0x00000018 # 0xC + 4*3
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Type: R_AMDGPU_ABS32
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Symbol: vffffffff
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Addend: 0x0
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Symbols:
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- Name: v0
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x0
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- Name: v1
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Type: STT_SECTION
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Section: .debug_info
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Value: 0x1
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- Name: vffffffff
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Type: STT_SECTION
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Section: .debug_info
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Value: 0xffffffff
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...
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