130 lines
5.5 KiB
C++
130 lines
5.5 KiB
C++
//===- GPUToNVVMPipeline.cpp - Test lowering to NVVM as a sink pass -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a pass for testing the lowering to NVVM as a generally
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// usable sink pass.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/AffineToStandard/AffineToStandard.h"
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#include "mlir/Conversion/ArithToLLVM/ArithToLLVM.h"
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#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVMPass.h"
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#include "mlir/Conversion/GPUCommon/GPUCommonPass.h"
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#include "mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h"
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#include "mlir/Conversion/IndexToLLVM/IndexToLLVM.h"
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#include "mlir/Conversion/MathToLLVM/MathToLLVM.h"
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#include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h"
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#include "mlir/Conversion/NVGPUToNVVM/NVGPUToNVVM.h"
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#include "mlir/Conversion/NVVMToLLVM/NVVMToLLVM.h"
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#include "mlir/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.h"
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#include "mlir/Conversion/SCFToControlFlow/SCFToControlFlow.h"
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
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#include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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#include "mlir/Dialect/GPU/Pipelines/Passes.h"
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#include "mlir/Dialect/GPU/Transforms/Passes.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/Linalg/Passes.h"
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#include "mlir/Dialect/MemRef/Transforms/Passes.h"
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#include "mlir/Pass/PassManager.h"
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#include "mlir/Pass/PassOptions.h"
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#include "mlir/Transforms/Passes.h"
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using namespace mlir;
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#if MLIR_CUDA_CONVERSIONS_ENABLED
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namespace {
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//===----------------------------------------------------------------------===//
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// Common pipeline
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//===----------------------------------------------------------------------===//
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void buildCommonPassPipeline(
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OpPassManager &pm, const mlir::gpu::GPUToNVVMPipelineOptions &options) {
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pm.addPass(createConvertNVGPUToNVVMPass());
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pm.addPass(createGpuKernelOutliningPass());
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pm.addPass(createConvertVectorToSCFPass());
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pm.addPass(createConvertSCFToCFPass());
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pm.addPass(createConvertNVVMToLLVMPass());
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pm.addPass(createConvertMathToLLVMPass());
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pm.addPass(createConvertFuncToLLVMPass());
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pm.addPass(memref::createExpandStridedMetadataPass());
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GpuNVVMAttachTargetOptions nvvmTargetOptions;
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nvvmTargetOptions.triple = options.cubinTriple;
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nvvmTargetOptions.chip = options.cubinChip;
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nvvmTargetOptions.features = options.cubinFeatures;
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nvvmTargetOptions.optLevel = options.optLevel;
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pm.addPass(createGpuNVVMAttachTarget(nvvmTargetOptions));
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pm.addPass(createLowerAffinePass());
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pm.addPass(createArithToLLVMConversionPass());
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ConvertIndexToLLVMPassOptions convertIndexToLLVMPassOpt;
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convertIndexToLLVMPassOpt.indexBitwidth = options.indexBitWidth;
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pm.addPass(createConvertIndexToLLVMPass(convertIndexToLLVMPassOpt));
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pm.addPass(createCanonicalizerPass());
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pm.addPass(createCSEPass());
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}
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//===----------------------------------------------------------------------===//
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// GPUModule-specific stuff.
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//===----------------------------------------------------------------------===//
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void buildGpuPassPipeline(OpPassManager &pm,
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const mlir::gpu::GPUToNVVMPipelineOptions &options) {
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pm.addNestedPass<gpu::GPUModuleOp>(createStripDebugInfoPass());
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ConvertGpuOpsToNVVMOpsOptions opt;
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opt.useBarePtrCallConv = options.kernelUseBarePtrCallConv;
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opt.indexBitwidth = options.indexBitWidth;
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pm.addNestedPass<gpu::GPUModuleOp>(createConvertGpuOpsToNVVMOps(opt));
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pm.addNestedPass<gpu::GPUModuleOp>(createCanonicalizerPass());
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pm.addNestedPass<gpu::GPUModuleOp>(createCSEPass());
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pm.addNestedPass<gpu::GPUModuleOp>(createReconcileUnrealizedCastsPass());
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}
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//===----------------------------------------------------------------------===//
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// Host Post-GPU pipeline
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//===----------------------------------------------------------------------===//
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void buildHostPostPipeline(OpPassManager &pm,
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const mlir::gpu::GPUToNVVMPipelineOptions &options) {
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GpuToLLVMConversionPassOptions opt;
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opt.hostBarePtrCallConv = options.hostUseBarePtrCallConv;
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opt.kernelBarePtrCallConv = options.kernelUseBarePtrCallConv;
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pm.addPass(createGpuToLLVMConversionPass(opt));
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GpuModuleToBinaryPassOptions gpuModuleToBinaryPassOptions;
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gpuModuleToBinaryPassOptions.compilationTarget = options.cubinFormat;
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pm.addPass(createGpuModuleToBinaryPass(gpuModuleToBinaryPassOptions));
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pm.addPass(createCanonicalizerPass());
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pm.addPass(createCSEPass());
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pm.addPass(createReconcileUnrealizedCastsPass());
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}
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} // namespace
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void mlir::gpu::buildLowerToNVVMPassPipeline(
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OpPassManager &pm, const GPUToNVVMPipelineOptions &options) {
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// Common pipelines
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buildCommonPassPipeline(pm, options);
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// GPUModule-specific stuff
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buildGpuPassPipeline(pm, options);
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// Host post-GPUModule-specific stuff
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buildHostPostPipeline(pm, options);
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}
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void mlir::gpu::registerGPUToNVVMPipeline() {
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PassPipelineRegistration<GPUToNVVMPipelineOptions>(
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"gpu-lower-to-nvvm-pipeline",
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"The default pipeline lowers main dialects (arith, memref, scf, "
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"vector, gpu, and nvgpu) to NVVM. It starts by lowering GPU code to the "
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"specified compilation target (default is fatbin) then lowers the host "
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"code.",
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buildLowerToNVVMPassPipeline);
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}
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#endif // MLIR_CUDA_CONVERSIONS_ENABLED
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