160 lines
6.9 KiB
TableGen
160 lines
6.9 KiB
TableGen
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//===-- RISCVGIsel.td - RISC-V GlobalISel Patterns ---------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file contains patterns that are relevant to GlobalISel, including
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/// GIComplexOperandMatcher definitions for equivalent SelectionDAG
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/// ComplexPatterns.
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//
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//===----------------------------------------------------------------------===//
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include "RISCV.td"
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include "RISCVCombine.td"
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def simm12Plus1 : ImmLeaf<XLenVT, [{
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return (isInt<12>(Imm) && Imm != -2048) || Imm == 2048;}]>;
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def simm12Plus1i32 : ImmLeaf<i32, [{
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return (isInt<12>(Imm) && Imm != -2048) || Imm == 2048;}]>;
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// FIXME: This doesn't check that the G_CONSTANT we're deriving the immediate
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// from is only used once
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def simm12Minus1Nonzero : ImmLeaf<XLenVT, [{
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return (Imm >= -2049 && Imm < 0) || (Imm > 0 && Imm <= 2046);}]>;
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def simm12Minus1NonzeroNonNeg1 : ImmLeaf<XLenVT, [{
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return (Imm >= -2049 && Imm < -1) || (Imm > 0 && Imm <= 2046);}]>;
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// Return an immediate value plus 1.
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def ImmPlus1 : SDNodeXForm<imm, [{
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return CurDAG->getTargetConstant(N->getSExtValue() + 1, SDLoc(N),
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N->getValuePtrVTpe(0));}]>;
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def GINegImm : GICustomOperandRenderer<"renderNegImm">,
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GISDNodeXFormEquiv<NegImm>;
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def GIImmSubFromXLen : GICustomOperandRenderer<"renderImmSubFromXLen">,
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GISDNodeXFormEquiv<ImmSubFromXLen>;
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def GIImmSubFrom32 : GICustomOperandRenderer<"renderImmSubFrom32">,
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GISDNodeXFormEquiv<ImmSubFrom32>;
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def GIImmPlus1 :
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GICustomOperandRenderer<"renderImmPlus1">,
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GISDNodeXFormEquiv<ImmPlus1>;
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def GIAddrRegImm :
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GIComplexOperandMatcher<s32, "selectAddrRegImm">,
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GIComplexPatternEquiv<AddrRegImm>;
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def gi_as_i64imm : GICustomOperandRenderer<"renderImm">,
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GISDNodeXFormEquiv<as_i64imm>;
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def gi_trailing_zero : GICustomOperandRenderer<"renderTrailingZeros">,
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GISDNodeXFormEquiv<TrailingZeros>;
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// FIXME: This is labelled as handling 's32', however the ComplexPattern it
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// refers to handles both i32 and i64 based on the HwMode. Currently this LLT
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// parameter appears to be ignored so this pattern works for both, however we
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// should add a LowLevelTypeByHwMode, and use that to define our XLenLLT instead
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// here.
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def GIShiftMaskXLen :
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GIComplexOperandMatcher<s32, "selectShiftMask">,
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GIComplexPatternEquiv<shiftMaskXLen>;
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def GIShiftMask32 :
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GIComplexOperandMatcher<s32, "selectShiftMask">,
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GIComplexPatternEquiv<shiftMask32>;
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def gi_sh1add_op : GIComplexOperandMatcher<s32, "selectSHXADDOp<1>">,
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GIComplexPatternEquiv<sh1add_op>;
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def gi_sh2add_op : GIComplexOperandMatcher<s32, "selectSHXADDOp<2>">,
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GIComplexPatternEquiv<sh2add_op>;
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def gi_sh3add_op : GIComplexOperandMatcher<s32, "selectSHXADDOp<3>">,
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GIComplexPatternEquiv<sh3add_op>;
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def gi_sh1add_uw_op : GIComplexOperandMatcher<s32, "selectSHXADD_UWOp<1>">,
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GIComplexPatternEquiv<sh1add_uw_op>;
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def gi_sh2add_uw_op : GIComplexOperandMatcher<s32, "selectSHXADD_UWOp<2>">,
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GIComplexPatternEquiv<sh2add_uw_op>;
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def gi_sh3add_uw_op : GIComplexOperandMatcher<s32, "selectSHXADD_UWOp<3>">,
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GIComplexPatternEquiv<sh3add_uw_op>;
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// FIXME: Canonicalize (sub X, C) -> (add X, -C) earlier.
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def : Pat<(XLenVT (sub GPR:$rs1, simm12Plus1:$imm)),
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(ADDI GPR:$rs1, (NegImm simm12Plus1:$imm))>;
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let Predicates = [IsRV64] in {
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def : Pat<(i32 (sub GPR:$rs1, simm12Plus1i32:$imm)),
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(ADDIW GPR:$rs1, (i64 (NegImm $imm)))>;
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def : Pat<(i32 (shl GPR:$rs1, (i32 GPR:$rs2))), (SLLW GPR:$rs1, GPR:$rs2)>;
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def : Pat<(i32 (sra GPR:$rs1, (i32 GPR:$rs2))), (SRAW GPR:$rs1, GPR:$rs2)>;
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def : Pat<(i32 (srl GPR:$rs1, (i32 GPR:$rs2))), (SRLW GPR:$rs1, GPR:$rs2)>;
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}
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// Ptr type used in patterns with GlobalISelEmitter
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def PtrVT : PtrValueTypeByHwMode<XLenVT, 0>;
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// Define pattern expansions for pointer ult/slt conditional codes
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def : Pat<(XLenVT (setult (PtrVT GPR:$rs1), simm12:$imm12)),
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(SLTIU GPR:$rs1, simm12:$imm12)>;
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def : Pat<(XLenVT (setult (PtrVT GPR:$rs1), (PtrVT GPR:$rs2))),
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(SLTU GPR:$rs1, GPR:$rs2)>;
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def : Pat<(XLenVT (setlt (PtrVT GPR:$rs1), simm12:$imm12)),
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(SLTI GPR:$rs1, simm12:$imm12)>;
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def : Pat<(XLenVT (setlt (PtrVT GPR:$rs1), (PtrVT GPR:$rs2))),
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(SLT GPR:$rs1, GPR:$rs2)>;
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// Define pattern expansions for setcc operations that aren't directly
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// handled by a RISC-V instruction.
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foreach Ty = [PtrVT, XLenVT] in {
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def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty 0))), (SLTIU GPR:$rs1, 1)>;
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def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty simm12Plus1:$imm12))),
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(SLTIU (ADDI GPR:$rs1, (NegImm simm12Plus1:$imm12)), 1)>;
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def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(SLTIU (XOR GPR:$rs1, GPR:$rs2), 1)>;
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def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty 0))), (SLTU (XLenVT X0), GPR:$rs1)>;
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def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty simm12Plus1:$imm12))),
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(SLTU (XLenVT X0), (ADDI GPR:$rs1, (NegImm simm12Plus1:$imm12)))>;
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def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(SLTU (XLenVT X0), (XOR GPR:$rs1, GPR:$rs2))>;
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def : Pat<(XLenVT (setugt (Ty GPR:$rs1), (Ty simm12Minus1NonzeroNonNeg1:$imm))),
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(XORI (SLTIU GPR:$rs1,
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(ImmPlus1 simm12Minus1NonzeroNonNeg1:$imm)), 1)>;
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def : Pat<(XLenVT (setugt (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(SLTU GPR:$rs2, GPR:$rs1)>;
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def : Pat<(XLenVT (setgt (Ty GPR:$rs1), (Ty simm12Minus1Nonzero:$imm))),
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(XORI (SLTI GPR:$rs1, (ImmPlus1 simm12Minus1Nonzero:$imm)), 1)>;
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def : Pat<(XLenVT (setgt (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(SLT GPR:$rs2, GPR:$rs1)>;
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def : Pat<(XLenVT (setuge (XLenVT GPR:$rs1), (Ty simm12:$imm))),
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(XORI (SLTIU GPR:$rs1, simm12:$imm), 1)>;
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def : Pat<(XLenVT (setuge (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(XORI (SLTU GPR:$rs1, GPR:$rs2), 1)>;
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def : Pat<(XLenVT (setge (Ty GPR:$rs1), (Ty simm12:$imm))),
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(XORI (SLTI GPR:$rs1, simm12:$imm), 1)>;
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def : Pat<(XLenVT (setge (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
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def : Pat<(XLenVT (setule (Ty GPR:$rs1), (Ty simm12Minus1NonzeroNonNeg1:$imm))),
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(SLTIU GPR:$rs1, (ImmPlus1 simm12Minus1NonzeroNonNeg1:$imm))>;
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def : Pat<(XLenVT (setule (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(XORI (SLTU GPR:$rs2, GPR:$rs1), 1)>;
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def : Pat<(XLenVT (setle (Ty GPR:$rs1), (Ty simm12Minus1Nonzero:$imm))),
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(SLTI GPR:$rs1, (ImmPlus1 simm12Minus1Nonzero:$imm))>;
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def : Pat<(XLenVT (setle (Ty GPR:$rs1), (Ty GPR:$rs2))),
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(XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
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}
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let Predicates = [IsRV32] in {
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def : LdPat<load, LW, PtrVT>;
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def : StPat<store, SW, GPR, PtrVT>;
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}
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let Predicates = [IsRV64] in {
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def : LdPat<load, LD, PtrVT>;
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def : StPat<store, SD, GPR, PtrVT>;
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}
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