bolt/deps/llvm-18.1.8/llvm/lib/Target/RISCV
2025-02-14 19:21:04 +01:00
..
AsmParser Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
Disassembler Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
GISel Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
MCA Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
MCTargetDesc Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
TargetInfo Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
CMakeLists.txt Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCV.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCV.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVAsmPrinter.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVCallingConv.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVCodeGenPrepare.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVCombine.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVDeadRegisterDefinitions.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVExpandAtomicPseudoInsts.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVExpandPseudoInsts.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVFeatures.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVFoldMasks.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVFrameLowering.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVFrameLowering.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVGatherScatterLowering.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVGISel.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInsertReadWriteCSR.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInsertVSETVLI.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInsertWriteVXRM.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrFormats.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrFormatsC.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrFormatsV.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrGISel.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfo.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfo.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfo.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoA.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoC.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoD.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoF.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoM.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoV.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoVPseudos.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoVSDPatterns.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoVVLPatterns.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoXCV.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoXSf.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoXTHead.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoXVentana.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZa.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZb.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZc.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZcmop.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZfa.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZfbfmin.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZfh.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZicbo.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZicfiss.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZicond.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZimop.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZk.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZvfbf.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVInstrInfoZvk.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVISelDAGToDAG.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVISelDAGToDAG.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVISelLowering.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVISelLowering.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVMachineFunctionInfo.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVMachineFunctionInfo.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVMacroFusion.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVMakeCompressible.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVMergeBaseOffset.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVMoveMerger.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVOptWInstrs.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVPostRAExpandPseudoInsts.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVProcessors.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVPushPopOptimizer.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVRedundantCopyElimination.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVRegisterInfo.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVRegisterInfo.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVRegisterInfo.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVRVVInitUndef.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSchedRocket.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSchedSiFive7.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSchedSiFiveP400.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSchedSyntacoreSCR1.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSchedule.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVScheduleV.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVScheduleZb.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSubtarget.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSubtarget.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVSystemOperands.td Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVTargetMachine.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVTargetMachine.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVTargetObjectFile.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVTargetObjectFile.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVTargetTransformInfo.cpp Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00
RISCVTargetTransformInfo.h Embed LLVM 18.1.8 2025-02-14 19:21:04 +01:00