446 lines
9.9 KiB
LLVM
446 lines
9.9 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=avr -march=avr -verify-machineinstrs | FileCheck %s
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; Optimize for speed.
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define i8 @shift_i8_i8_speed(i8 %a, i8 %b) {
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; CHECK-LABEL: shift_i8_i8_speed:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brmi .LBB0_2
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; CHECK-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brpl .LBB0_1
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; CHECK-NEXT: .LBB0_2:
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; CHECK-NEXT: ret
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%result = shl i8 %a, %b
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ret i8 %result
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}
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; Optimize for size (producing slightly smaller code).
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define i8 @shift_i8_i8_size(i8 %a, i8 %b) optsize {
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; CHECK-LABEL: shift_i8_i8_size:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brmi .LBB1_3
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; CHECK-NEXT: ; %bb.2: ; in Loop: Header=BB1_1 Depth=1
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rjmp .LBB1_1
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; CHECK-NEXT: .LBB1_3:
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; CHECK-NEXT: ret
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%result = shl i8 %a, %b
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ret i8 %result
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}
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define i16 @shift_i16_i16(i16 %a, i16 %b) {
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; CHECK-LABEL: shift_i16_i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brmi .LBB2_2
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; CHECK-NEXT: .LBB2_1: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: dec r22
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; CHECK-NEXT: brpl .LBB2_1
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; CHECK-NEXT: .LBB2_2:
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; CHECK-NEXT: ret
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%result = shl i16 %a, %b
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ret i16 %result
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}
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define i64 @shift_i64_i64(i64 %a, i64 %b) {
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; CHECK-LABEL: shift_i64_i64:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: push r16
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; CHECK-NEXT: push r17
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; CHECK-NEXT: mov r30, r10
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; CHECK-NEXT: mov r31, r11
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; CHECK-NEXT: cpi r30, 0
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; CHECK-NEXT: breq .LBB3_3
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; CHECK-NEXT: ; %bb.1: ; %shift.loop.preheader
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; CHECK-NEXT: mov r27, r1
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; CHECK-NEXT: mov r16, r1
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; CHECK-NEXT: mov r17, r1
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; CHECK-NEXT: .LBB3_2: ; %shift.loop
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mov r31, r21
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; CHECK-NEXT: lsl r31
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; CHECK-NEXT: mov r26, r1
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; CHECK-NEXT: rol r26
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; CHECK-NEXT: lsl r22
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; CHECK-NEXT: rol r23
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; CHECK-NEXT: rol r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: or r24, r16
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; CHECK-NEXT: or r25, r17
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; CHECK-NEXT: or r22, r26
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; CHECK-NEXT: or r23, r27
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; CHECK-NEXT: lsl r18
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; CHECK-NEXT: rol r19
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; CHECK-NEXT: rol r20
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; CHECK-NEXT: rol r21
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; CHECK-NEXT: dec r30
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; CHECK-NEXT: cpi r30, 0
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; CHECK-NEXT: brne .LBB3_2
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; CHECK-NEXT: .LBB3_3: ; %shift.done
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; CHECK-NEXT: pop r17
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; CHECK-NEXT: pop r16
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; CHECK-NEXT: ret
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%result = shl i64 %a, %b
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ret i64 %result
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}
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define i8 @lsl_i8_1(i8 %a) {
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; CHECK-LABEL: lsl_i8_1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: ret
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%res = shl i8 %a, 1
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ret i8 %res
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}
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define i8 @lsl_i8_2(i8 %a) {
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; CHECK-LABEL: lsl_i8_2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: ret
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%res = shl i8 %a, 2
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ret i8 %res
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}
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define i8 @lsl_i8_3(i8 %a) {
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; CHECK-LABEL: lsl_i8_3:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: ret
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%res = shl i8 %a, 3
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ret i8 %res
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}
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define i8 @lsl_i8_4(i8 %a) {
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; CHECK-LABEL: lsl_i8_4:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, -16
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; CHECK-NEXT: ret
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%res = shl i8 %a, 4
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ret i8 %res
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}
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define i8 @lsl_i8_5(i8 %a) {
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; CHECK-LABEL: lsl_i8_5:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, -16
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: ret
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%res = shl i8 %a, 5
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ret i8 %res
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}
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define i8 @lsl_i8_6(i8 %a) {
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; CHECK-LABEL: lsl_i8_6:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, -16
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: ret
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%res = shl i8 %a, 6
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ret i8 %res
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}
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define i8 @lsr_i8_1(i8 %a) {
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; CHECK-LABEL: lsr_i8_1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: ret
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%res = lshr i8 %a, 1
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ret i8 %res
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}
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define i8 @lsr_i8_2(i8 %a) {
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; CHECK-LABEL: lsr_i8_2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: ret
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%res = lshr i8 %a, 2
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ret i8 %res
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}
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define i8 @lsr_i8_3(i8 %a) {
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; CHECK-LABEL: lsr_i8_3:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: ret
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%res = lshr i8 %a, 3
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ret i8 %res
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}
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define i8 @lsr_i8_4(i8 %a) {
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; CHECK-LABEL: lsr_i8_4:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: ret
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%res = lshr i8 %a, 4
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ret i8 %res
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}
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define i8 @lsr_i8_5(i8 %a) {
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; CHECK-LABEL: lsr_i8_5:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: ret
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%res = lshr i8 %a, 5
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ret i8 %res
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}
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define i8 @lsr_i8_6(i8 %a) {
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; CHECK-LABEL: lsr_i8_6:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: lsr r24
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; CHECK-NEXT: ret
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%res = lshr i8 %a, 6
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ret i8 %res
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}
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define i8 @lsl_i8_7(i8 %a) {
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; CHECK-LABEL: lsl_i8_7:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = shl i8 %a, 7
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ret i8 %result
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}
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define i8 @lsr_i8_7(i8 %a) {
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; CHECK-LABEL: lsr_i8_7:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: rol r24
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: rol r24
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; CHECK-NEXT: ret
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%result = lshr i8 %a, 7
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ret i8 %result
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}
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define i8 @asr_i8_6(i8 %a) {
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; CHECK-LABEL: asr_i8_6:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: bst r24, 6
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: sbc r24, r24
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; CHECK-NEXT: bld r24, 0
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; CHECK-NEXT: ret
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%result = ashr i8 %a, 6
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ret i8 %result
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}
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define i8 @asr_i8_7(i8 %a) {
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; CHECK-LABEL: asr_i8_7:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: sbc r24, r24
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; CHECK-NEXT: ret
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%result = ashr i8 %a, 7
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ret i8 %result
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}
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define i16 @lsl_i16_5(i16 %a) {
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; CHECK-LABEL: lsl_i16_5:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r25, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: andi r24, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: ret
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%result = shl i16 %a, 5
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ret i16 %result
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}
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define i16 @lsl_i16_6(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f) {
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; CHECK-LABEL: lsl_i16_6:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: mov r24, r14
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; CHECK-NEXT: mov r25, r15
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r25, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: andi r24, 240
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; CHECK-NEXT: eor r25, r24
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: lsl r24
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; CHECK-NEXT: rol r25
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; CHECK-NEXT: ret
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%result = shl i16 %f, 6
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ret i16 %result
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}
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define i16 @lsl_i16_9(i16 %a) {
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; CHECK-LABEL: lsl_i16_9:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: mov r25, r24
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: lsl r25
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; CHECK-NEXT: ret
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%result = shl i16 %a, 9
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ret i16 %result
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}
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define i16 @lsl_i16_13(i16 %a) {
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; CHECK-LABEL: lsl_i16_13:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: mov r25, r24
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: andi r25, 240
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; CHECK-NEXT: clr r24
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; CHECK-NEXT: lsl r25
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; CHECK-NEXT: ret
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%result = shl i16 %a, 13
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ret i16 %result
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}
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define i16 @lsr_i16_5(i16 %a) {
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; CHECK-LABEL: lsr_i16_5:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: andi r25, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: lsr r25
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; CHECK-NEXT: ror r24
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; CHECK-NEXT: ret
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%result = lshr i16 %a, 5
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ret i16 %result
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}
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define i16 @lsr_i16_6(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f) {
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; CHECK-LABEL: lsr_i16_6:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: mov r24, r14
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; CHECK-NEXT: mov r25, r15
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; CHECK-NEXT: swap r25
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; CHECK-NEXT: swap r24
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; CHECK-NEXT: andi r24, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: andi r25, 15
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; CHECK-NEXT: eor r24, r25
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; CHECK-NEXT: lsr r25
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|
|
; CHECK-NEXT: ror r24
|
||
|
|
; CHECK-NEXT: lsr r25
|
||
|
|
; CHECK-NEXT: ror r24
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = lshr i16 %f, 6
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @lsr_i16_9(i16 %a) {
|
||
|
|
; CHECK-LABEL: lsr_i16_9:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: mov r24, r25
|
||
|
|
; CHECK-NEXT: clr r25
|
||
|
|
; CHECK-NEXT: lsr r24
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = lshr i16 %a, 9
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @lsr_i16_13(i16 %a) {
|
||
|
|
; CHECK-LABEL: lsr_i16_13:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: mov r24, r25
|
||
|
|
; CHECK-NEXT: swap r24
|
||
|
|
; CHECK-NEXT: andi r24, 15
|
||
|
|
; CHECK-NEXT: clr r25
|
||
|
|
; CHECK-NEXT: lsr r24
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = lshr i16 %a, 13
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @asr_i16_7(i16 %a) {
|
||
|
|
; CHECK-LABEL: asr_i16_7:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: lsl r24
|
||
|
|
; CHECK-NEXT: mov r24, r25
|
||
|
|
; CHECK-NEXT: rol r24
|
||
|
|
; CHECK-NEXT: sbc r25, r25
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = ashr i16 %a, 7
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @asr_i16_9(i16 %a) {
|
||
|
|
; CHECK-LABEL: asr_i16_9:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: mov r24, r25
|
||
|
|
; CHECK-NEXT: lsl r25
|
||
|
|
; CHECK-NEXT: sbc r25, r25
|
||
|
|
; CHECK-NEXT: asr r24
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = ashr i16 %a, 9
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @asr_i16_12(i16 %a) {
|
||
|
|
; CHECK-LABEL: asr_i16_12:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: mov r24, r25
|
||
|
|
; CHECK-NEXT: lsl r25
|
||
|
|
; CHECK-NEXT: sbc r25, r25
|
||
|
|
; CHECK-NEXT: asr r24
|
||
|
|
; CHECK-NEXT: asr r24
|
||
|
|
; CHECK-NEXT: asr r24
|
||
|
|
; CHECK-NEXT: asr r24
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = ashr i16 %a, 12
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @asr_i16_14(i16 %a) {
|
||
|
|
; CHECK-LABEL: asr_i16_14:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: lsl r25
|
||
|
|
; CHECK-NEXT: sbc r24, r24
|
||
|
|
; CHECK-NEXT: lsl r25
|
||
|
|
; CHECK-NEXT: mov r25, r24
|
||
|
|
; CHECK-NEXT: rol r24
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = ashr i16 %a, 14
|
||
|
|
ret i16 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
define i16 @asr_i16_15(i16 %a) {
|
||
|
|
; CHECK-LABEL: asr_i16_15:
|
||
|
|
; CHECK: ; %bb.0:
|
||
|
|
; CHECK-NEXT: lsl r25
|
||
|
|
; CHECK-NEXT: sbc r25, r25
|
||
|
|
; CHECK-NEXT: mov r24, r25
|
||
|
|
; CHECK-NEXT: ret
|
||
|
|
%result = ashr i16 %a, 15
|
||
|
|
ret i16 %result
|
||
|
|
}
|