51 lines
1.5 KiB
LLVM
51 lines
1.5 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
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declare <32 x i8> @llvm.loongarch.lasx.xvreplgr2vr.b(i32)
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define <32 x i8> @lasx_xvreplgr2vr_b(i32 %a) nounwind {
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; CHECK-LABEL: lasx_xvreplgr2vr_b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvreplgr2vr.b $xr0, $a0
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; CHECK-NEXT: ret
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entry:
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%res = call <32 x i8> @llvm.loongarch.lasx.xvreplgr2vr.b(i32 %a)
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ret <32 x i8> %res
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}
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declare <16 x i16> @llvm.loongarch.lasx.xvreplgr2vr.h(i32)
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define <16 x i16> @lasx_xvreplgr2vr_h(i32 %a) nounwind {
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; CHECK-LABEL: lasx_xvreplgr2vr_h:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvreplgr2vr.h $xr0, $a0
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; CHECK-NEXT: ret
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entry:
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%res = call <16 x i16> @llvm.loongarch.lasx.xvreplgr2vr.h(i32 %a)
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ret <16 x i16> %res
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}
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declare <8 x i32> @llvm.loongarch.lasx.xvreplgr2vr.w(i32)
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define <8 x i32> @lasx_xvreplgr2vr_w(i32 %a) nounwind {
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; CHECK-LABEL: lasx_xvreplgr2vr_w:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvreplgr2vr.w $xr0, $a0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i32> @llvm.loongarch.lasx.xvreplgr2vr.w(i32 %a)
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ret <8 x i32> %res
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}
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declare <4 x i64> @llvm.loongarch.lasx.xvreplgr2vr.d(i64)
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define <4 x i64> @lasx_xvreplgr2vr_d(i64 %a) nounwind {
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; CHECK-LABEL: lasx_xvreplgr2vr_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvreplgr2vr.d $xr0, $a0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i64> @llvm.loongarch.lasx.xvreplgr2vr.d(i64 %a)
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ret <4 x i64> %res
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}
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